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15 25 35 45 55 65 75 85 95 105
Added Receiver Type-2 Period Jitter − ps
f − Frequency − MHz
V
CC
= 3.3 V
V
IC
= 1 V,
|V
ID
| = 400 mV,
Input = Clock
0
3
6
9
12
15
18
15 25 35 45 55 65 75 85 95 105
Added Driver Period Jitter − ps
f − Frequency − MHz
V
CC
= 3.3 V
Input = Clock
0
10
20
30
40
50
60
15 25 35 45 55 65 75 85 95 105
f − Frequency − MHz
Added Receiver Type-2 Cycle-To-Cycle Jitter − ps
V
CC
= 3.3 V
V
IC
= 1 V,
|V
ID
| = 400 mV,
Input = Clock
0
10
20
30
40
50
60
15 25 35 45 55 65 75 85 95 105
f − Frequency − MHz
Added Receiver Type-1 Cycle-To-Cycle Jitter − ps
V
CC
= 3.3 V
V
IC
= 1 V,
|V
ID
| = 200 mV,
Input = Clock
SN65MLVD080
SN65MLVD082
SLLS581B – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
TYPICAL CHARACTERISTICS (continued)
ADDED RECEIVER TYPE-2 PERIOD JITTER ADDED DRIVER PERIOD JITTER
vs vs
FREQUENCY FREQUENCY
Figure 25. Figure 26.
ADDED RECEIVER TYPE-1 CYCLE-TO-CYCLE JITTER ADDED RECEIVER TYPE-2 CYCLE-TO-CYCLE JITTER
vs vs
FREQUENCY FREQUENCY
Figure 27. Figure 28.
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