Datasheet

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15 pF
t
pZL
t
pLZ
V
OL
V
OL
+0.5 V
V
O
R
L
499 Ω
_
+
V
TEST
B
A
RE
1.2 V
Inputs
V
CC
1 V
V
CC
V
CC
/2
0 V
V
CC
V
CC
/2
V
TEST
A
RE
V
O
0 V
1.4 V
A
t
pZH
t
pHZ
0 V
V
OH
-0.5 V
V
CC
V
CC
/2
0 V
V
OH
V
CC
/2
RE
V
O
V
TEST
C
L
SN65MLVD080
SN65MLVD082
SLLS581B – SEPTEMBER 2003 – REVISED SEPTEMBER 2005
A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, frequency = 1 MHz,
duty cycle = 50 ± 5%.
B. R
L
is 1% tolerance, metal film, surface mount, and located within 2 cm of the D.U.T.
C. C
L
is the instrumentation and fixture capacitance within 2 cm of the DUT and ±20%. The measurement is made on
test equipment with a -3 dB bandwidth of at least 1 GHz.
Figure 11. Receiver Enable/Disable Time Test Circuit and Waveforms
11
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