Datasheet

SN65LVPE504
www.ti.com
SLLSE46 SEPTEMBER 2010
PIN FUNCTIONS (continued)
PIN
I/O TYPE DESCRIPTION
NO. NAME
HIGH SPEED DIFFERENTIAL I/O PINS (continued)
28 TX3+
27 TX3–
Non-inverting and inverting CML differential output for CH 1 and CH 4. These pins are internally tied to voltage
O, CML
bias by termination resistors
25 TX4+
24 TX4–
DEVICE CONTROL PIN
40 EN_RXD I, LVCMOS Sets device operation modes per Table 1. Internally pulled to VCC
42 PS2 I, LVCMOS Tying pin to VCC slaves CH2-4 electrical idle and Rx.Detect function to CH1. Internally pulled to GND
18 PS1 I, LVCMOS Select auto-low power save mode per Table 1. Internally pulled to GND
20 SQ_TH
(1)
I, LVCMOS Squelch threshold level select pin for electrical idle detect per Table 1 Internally pulled to VCC/2
39 RST I, LVCMOS Reset device, input active Low. Internally pulled to VCC
SIGNAL CONDITIONING PINS
(1)
21 DE I, LVCMOS Selects de-emphasis settings for CH 1-CH 4 per Table 1. Internally pulled to Vcc/2
19 EQ I, LVCMOS Selects equalization settings for CH 1-CH 4 per Table 1. Internally pulled to Vcc/2
41 OS I, LVCMOS Selects output amplitude for CH 1-CH 4 per Table 1. Internally pulled to Vcc/2
POWER PINS
1,9,17,22,30,38 VCC Power Positive supply should be 3.3V ± 10%
5,8,10,13,
GND Power Supply ground
26,29,31,34û
(1) Internally biased to Vcc/2 with >200k pull-up/pull-down. When 3-state pins are left as NC, board leakage at the pin pad must be < 1 µA
otherwise drive to Vcc/2 to assert mid-level state.
Table 1. Control Pin Settings
OUTPUT SWING (CH1-CH4) at 5Gbps SQUELCH THRESHOLD (CH1-CH4)
TRANSITION BIT AMPLITUDE MIN DIFFERENTIAL INPUT
OS SQ_TH
(TYP mVpp) (CH1-CH4)
0 800 0 47 mVpp
NC (default) 929 NC (default) 61 mVpp
1 1047 1 83 mVpp
OUTPUT DE-EMPHASIS (CH1-CH4) at 5Gbps INPUT EQUALIZATION (CH1-CH4)
DE OS = NC OS = 0 OS = 1 EQ Equalization dB (at 5Gbps)
NC (default) –3.4dB –2.1dB –4.6dB 0 0
0 –6.2dB –4.9dB –7.2dB NC 7 (default)
1 –10.3dB –9.2dB –11dB 1 15
EN_RXD DEVICE FUNCTION
0 Set input termination to Rx_DC
1 Perform Rx detect after power up
RST DEVICE FUNCTION
0 Device in standby state, inputs set to Hi-Z
1 Device in active mode
PS1 DEVICE FUNCTION
0 Auto-low power mode disabled (default)
1 Auto-low power mode enabled
PS2 DEVICE FUNCTION
0 Electrical Idle and Rx Detect independent for CH1-CH4 (default)
1 CH2-CH4 Electrical Idle and Rx Detect slaved to CH1
Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): SN65LVPE504