Datasheet

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PARAMETER MEASUREMENT INFORMATION
V
OD
100 Ω
3.75 kΩ
3.75 kΩ
_
+
0 V ≤ V
test
≤ 2.4 V
Y
Z
Input
V
OC
Z
Y
Input
2 pF
3 V
0 V
V
OC(PP)
V
OC(SS)
V
OC
49.9 Ω, ±1% (2 Places)
V
IA
D
2 V
1.4 V
0.8 V
100%
80%
20%
0%
0 V
V
OD(H)
V
OD(L)
Output
Input
V
OD
Z
Y
Input
100 Ω
±1%
C
L
(2 Places)
t
PHL
t
PLH
t
f
t
r
SN65LVDT14-EP, SN65LVDT41-EP
SCES633 – JUNE 2005
Figure 5. Driver VDO Test Circuit
A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, pulse repetition rate
(PRR) = 0.5 Mpps, pulse width = 500 ± 10 µ s. C
L
includes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T. The measurement of V
OC(PP)
is made on test equipment with a –3-dB bandwidth of at least 1 GHz.
Figure 6. Test Circuit and Definitions for Driver Common-Mode Output Voltage
A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, pulse repetition rate
(PRR) = 1 Mpps, pulse width = 0.5 ± 0.05 µ s. C
L
includes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T.
Figure 7. Test Circuit, Timing, and Voltage Definitions for Differential Output Signal
8