Datasheet

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Serial In
CLK
Serial-In/Parallel-Out
Shift Register
A,B, ...G
A0P
A0M
Serial In
CLK
Serial-In/Parallel-Out
Shift Register
A,B, ...G
A1P
A1M
Serial In
CLK
Serial-In/Parallel-Out
Shift Register
A,B, ...G
A2P
A2M
Clock In
CLK
7× Clock/PLL
Clock Out
CLKINP
CLKINM
Control Logic
SHTDN
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
CLKOUT
SN65LVDS96
SLLS296H – MAY 1998 – REVISED JULY 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
2
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