Datasheet

SN65LVDS95
www.ti.com
SLLS297J MAY 1998 REVISED MAY 2011
ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
IT
Input voltage threshold 1.4 V
|V
OD
| Differential steady-state output voltage magnitude 247 454
R
L
= 100 , See Figure 3 mV
Change in the steady-state differential output voltage
Δ|V
OD
| 50
magnitude between opposite binary states
1.37
V
OC(SS)
Steady-state common-mode output voltage 1.125 V
5
See Figure 3
V
OC(PP)
Peak-to-peak common-mode output voltage 80 150 mV
I
IH
High-level input current V
IH
= V
CC
20 μA
I
IL
Low-level input current V
IL
= 0 V ±10 μA
V
OY
= 0 V ±24 mA
I
OS
Short-circuit output current
V
OD
= 0 V ±12 mA
I
OZ
High-impedance state output current V
O
= 0 V to V
CC
±10 μA
Disabled, all inputs at GND 280 μA
Enabled, R
L
= 100 (4 places),
I
CC(AVG)
Quiescent current (average)
Worst-case pattern (see Figure 4), 85 110 mA
t
c
= 15.38 ns
C
i
Input capacitance 3 pF
(1) All typical values are V
CC
= 3.3 V, T
A
= 25°C.
TIMING REQUIREMENTS
MIN NOM MAX UNIT
t
c
Input clock period 14.7 t
c
50 ns
t
w
High-level input clock pulse width duration 0.4t
c
0.6t
c
ns
t
t
Input signal transition time 5 ns
t
su
Data setup time, D0 through D27 before CLKIN ('95) (see Figure 2) 3 ns
t
h
Data hold time, D0 through D27 after CLKIN ('95) (see Figure 2) 1.5 ns
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