Datasheet

Serial/LOAD
CLK
Parallel-Load 7-Bit
Shift Register
D0–6
Serial/LOAD
CLK
Parallel-Load 7-Bit
Shift Register
D7–13
Serial/LOAD
CLK
Parallel-Load 7-Bit
Shift Register
D14–20
CLKINH
7×CLK
7× Clock/PLL
CLKIN
Control Logic
SHTDN
CLK
A,B, ...G
A,B, ...G
A,B, ...G
7
7
7
Y0M
Y0P
Y1M
Y1P
Y2M
Y2P
CLKOUTM
CLKOUTP
SN65LVDS95
SLLS297J MAY 1998 REVISED MAY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
FUNCTIONAL BLOCK DIAGRAM
2 Copyright © 19982011, Texas Instruments Incorporated