Datasheet

SN65LVDS93A
www.ti.com SLLS992A –AUGUST 2009– REVISED AUGUST 2011
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN NOM MAX UNIT
Supply voltage, VCC 3 3.3 3.6
LVDS output Supply voltage, LVDSVCC 3 3.3 3.6
PLL analog supply voltage, PLLVCC 3 3.3 3.6 V
IO input reference Supply voltage, IOVCC 1.62 1.8 / 2.5 / 3.3 3.6
Power supply noise on any VCC terminal 0.1
IOVCC = 1.8V IOVCC/2 + 0.3V
High-level input voltage, V
IH
IOVCC = 2.5V IOVCC/2 + 0.4V V
IOVCC = 3.3V IOVCC/2 + 0.5V
IOVCC = 1.8V IOVCC/2 - 0.3V
Low-level input voltage, V
IL
IOVCC = 2.5V IOVCC/2 - 0.4V V
IOVCC = 3.3V IOVCC/2 - 0.5V
Differential load impedance, Z
L
90 132 Ω
Operating free-air temperature, T
A
-45 85 C
DISSIPATION RATINGS
DERATING FACTOR
(2)
T
JA
= 70°C
PACKAGE CIRCUIT BOARD MODEL
(1)
T
JA
≤ 25°C
ABOVE T
JA
= 25°C POWER RATING
DGG 1111mW 12.3mW/°C 555mW
Low-K
ZQL 1034mW 11.5mW/°C 517mW
DGG 1730mW 19mW/°C 865mW
High-K
ZQL 2000mW 22mW/°C 1000mW
(1) In accordance with the High-K and Low-K thermal metric definitions of EIA/JESD51-2.
(2) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
TIMING REQUIREMENTS
PARAMETER MIN MAX UNIT
Input clock period, t
c
7.4 100 ns
Input clock modulation
w/ modulation frequency 30kHz 8%
w/ modulation frequency 50kHz 6%
High-level input clock pulse width duration, t
w
0.4 t
c
0.6 t
c
ns
Input signal transition time, t
t
3 ns
Data set up time, D0 through D27 before CLKIN (See Figure 3) 2 ns
Data hold time, D0 through D27 after CLKIN 0.8 ns
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