Datasheet

Yn
V
OD(H)
V
OD(L)
0 V
t
d0
− t
d6
t
d2
t
d3
t
d4
t
d5
t
d6
t
d7
CLKOUT
t
d1
t
d0
1.4 V
t
d7
CLKIN
CLKOUT
or
Yn
CLKIN
Reference VCO
Device
Under
Test
Modulation
∑
+
+
V(t) = A sin (2 π f
(mod)
t)
HP8665A
Synthesized
Signal Generator
0.1 MHz − 4200 MHz
HP8133A
Pulse Generator
RF Output Ext. Input
Device Under Test Tek TDS794D
Digital Scope
OUTPUT CLKIN CLKOUT Input
SN65LVDS84AQ-Q1
www.ti.com ........................................................................................................................................................ SLLS766A – AUGUST 2006 – REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 6. Timing Definitions
Figure 7. Clock Jitter Test Setup
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