Datasheet

V
IB
V
ID
V
IA
V
IC
V
O
A
B
R
V
IA
) V
IB
2
I
IA
I
IB
I
O
V
ID
V
O
10 pF,
2 Places
10 pF
100 Ω
†
1000 Ω
1000 Ω
100 Ω
V
IC
V
ID
V
V
O
ID
V
V
O
IT+
0 V
–50 mV
50 mV
0 V
V
IT–
†
Remove for testing LVDT device.
+
--
NOTE: Input signal of 3 Mpps, duration of 167 ns, and transition time of <1 ns.
NOTE: Input signal of 3 Mpps, duration of 167 ns, and transition time of <1 ns.
S0481-01
SN65LVDS4
SLLSE15 – JULY 2011 www.ti.com
PARAMETER MEASUREMENT INFORMATION
Figure 1. Receiver Voltage and Current Definitions
Figure 2. V
IT+
and V
IT-
Input Voltage Threshold Test Circuit and Definitions
6 Copyright © 2011, Texas Instruments Incorporated