Datasheet

SN65LVDS4
www.ti.com SLLSE15 –JULY 2011
THERMAL INFORMATION
SN65LVDS4
THERMAL METRIC
(1)
RSE UNIT
10 PINS
θ
JA
Junction-to-ambient thermal resistance
(2)
171.2 °C/W
θ
JCtop
Junction-to-case (top) thermal resistance
(3)
60.7 °C/W
θ
JB
Junction-to-board thermal resistance
(4)
71.4 °C/W
ψ
JT
Junction-to-top characterization parameter
(5)
0.8 °C/W
ψ
JB
Junction-to-board characterization parameter
(6)
64.7 °C/W
θ
JCbot
Junction-to-case (bottom) thermal resistance
(7)
N/A °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
PARAMETER TEST CONDITION MIN NOM MAX UNIT
V
CC1.8
Core supply voltage 1.62 1.8 1.98 V
V
CC2.5
Core supply voltage 2.25 2.5 2.75 V
V
DD1.8
Output drive voltage 1.62 1.8 1.98 V
V
DD2.5
Output drive voltage 2.25 2.5 2.75 V
V
DD3.3
Output drive voltage 3 3.3 3.6 V
T
A
Operating free-air temperature –40 85 °C
|V
ID
| Magnitude of differential input voltage 0.15 0.6 V
f
op
Operating frequency range 10 250 MHz
Input voltage (any combination of input or common-mode
|VIN
MAX
| 0 V
CC
V
voltage)
(1)
See VIN
MAX
.
(1) Any combination of input or common-mode voltage should not be below 0 V or above V
CC
.
Copyright © 2011, Texas Instruments Incorporated 3