User’s Guide July 2000 AAP Data Transmission SLLU013
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Trademarks Preface Read This First About This Manual This is the user’s guide for the SN65LVDS387EVM and SN65LVDS386 evaluation modules (EVMs). It contains information on the evaluation modules (EVMs) for Texas Instruments’ SN65LVDS387 16-channel LVDS driver and for the SN65LVDS386 16-channel LVDS receiver. Two separate EVMs are available, allowing each LVDS device to be tested individually using a single EVM for that device.
Running Title—Attribute Reference Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 2 The Evaluation Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.1 SN65LVDS387 16-Channel LVDS Line Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 2.
Running Title—Attribute Reference Figures 2–1. 2–2. 2–3. 4–1. vi EVM Simplified I/O Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SN65LVDS387EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SN65LVDS386EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Examples of Multidrop Interconnections . . . . . . .
Chapter 1 Introduction This is the user’s guide for the evaluation modules (EVMs) for the Texas Instruments’ SN65LVDS387EVM 16-channel LVDS driver EVM and the SN65LVDS386EVM 16-channel LVDS receiver EVM. One manual is used for both EVMs because the boards are similar for both devices. The EVMs are CE-compliant for distribution within the European Community.
Chapter 2 The Evaluation Boards Each EVM consists of a six-layer printed-wiring board (PWB). The LVDS device and BergStick connectors are on the top (connector side) of the board. All other passive components are installed on the underside (component side) of the PWB. A simplified input/output (I/O) block diagram of the EVM is shown in Figure 2–1. Topic Page 2.1 SN65LVDS387 16-Channel LVDS Line Driver . . . . . . . . . . . . . . . . . . . . 2-3 2.2 SN65LVDS386 16-Channel LVDS Line Receiver . . . . .
Figure 2–1. EVM Simplified I/O Block Diagram LVTTL Input Connector VCC GND LVDS Output Connector LVTTL Output VCC GND Connector LVDS Input Connector EN_A EN_A A1Y A1Z A1A 51 D4Y 100 D4B D4A A2Y A2Z A2A D3B D3Y D3A A3Y A3Z A3A D2B D2Y D2A A4Y A4Z A4A LVDS Driver (1 of 4) LVDS387EVM D1B D1Y LVDS Receiver (1 of 4) D1A LVDS386EVM The SN65LVDS387EVM and the SN65LVDS386EVM are discussed in sections 2.1 and 2.2.
SN65LVDS387 16-Channel LVDS Line Driver 2.1 SN65LVDS387 16-Channel LVDS Line Driver This 16-channel LVDS driver accepts 16 low-voltage TTL (LVTTL) inputs and generates 16 LVDS differential outputs (please refer to the schematic in Appendix I). Connectors P1/P2 are the LVTTL I/O connectors. Connectors P3 through P7 are the LVDS I/O connectors. The LVTTL inputs can be provided by any suitable source.
SN65LVDS387 16-Channel LVDS Line Driver Figure 2–2.
SN65LVDS386 16-Channel LVDS Line Receiver 2.2 SN65LVDS386 16-Channel LVDS Line Receiver The SN65LVDS386EVM accepts 16 LVDS inputs and generates 16 LVTTL outputs (refer to the schematic in Appendix I). Connectors P3 through P7 (right-side edge) accept the differential LVDS inputs and connector P1/P2 provides the LVTTL output signals. The as shipped configuration of the SN65LVDS386 EVM also contains external resistors required for basic operation and testing of the device.
SN65LVDS386 16-Channel LVDS Line Receiver Figure 2–3.
Chapter 3 Equipment Required This chapter provides guidance for selecting the test equipment required to use the EVM. Topic Page 3.1 Pattern Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 Oscilloscope and Scope Probes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.3 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.4 Cables . . . . . . . . . . . .
Pattern Generator 3.1 Pattern Generator The SN65LVDS387 EVM requires a signal or pattern generator that can provide at least one LVTTL input signal to the device. The LVTTL signal levels provided to the SN65LVDS387EVM must have a VIH = 2 Vdc minimum. Sixteen simultaneous LVTTL inputs are required to fully exercise the device, so a pattern generator with 16 parallel LVTTL outputs and a signaling-rate range up to several hundred megabits-per-second (Mbps) is suggested.
Chapter 4 Operation The SN65LVDS386 and SN65LVDS387 EVMs provide easy I/O connections for instrumentation. This makes device testing quick and easy. Individual channels can be tested and parameters evaluated for specific applications. In addition, the EVMs are small and compact to allow the entire PWB to be placed in a small temperature chamber. Also, the I/O connectors and enable jumpers are located away from the device, and all external resistors are located on the opposite side of the EVM.
SN65LVDS387EVM Operation 4.1 SN65LVDS387EVM Operation The SN65LVDS387EVM is ready to be used as shipped. When connected to the test instrumentation and 3.3-Vdc power (as described in section 3), performance can be tested and observed. All I/O connections are made using standard BergSticks that allow fast and easy connections. These also allow direct connections to oscilloscope probes.
SN65LVDS386EVM Operation 4.2 SN65LVDS386EVM Operation Like the SN65LVDS387EVM, the SN65LVDS386EVM is shipped with all required components already installed on the board, and is ready for testing. For the LVDS386, differential inputs need to be provided to simulate the differential output-voltage levels (Vod is nominally 400 mV) and common-mode outputvoltage inputs (nominally 1.2 Vdc) of an LVDS driver. These inputs are easily connected to the right edge P3-P7 LVDS side of the SN65LVDS386EVM.
System Evaluation Using Both the SN65LVDS387EVM and Figure 4–1.
References Note: When testing an SN65LVDS387EVM and SN65LVDS386EVM together, make sure R1 through R16 (100 Ω) are not installed on the SN65LVDS387EVM. Termination of the LVDS signal lines needs to be done on the SN65LVDS386EVM. 4.4 References There is a wide selection of LVDS devices and related applications materials available to assist in the design and development of LVDS interfaces. This information is located at http://www.ti.com/sc/datatran.
Appendix A Parts List and Schematics This appendix presents the parts list and schematics for as-shipped configurations of LVDS387 and LVDS386 EVMs. Note that equivalent parts may be used. Topic Page A.1 Parts List for EVMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2 A.2 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
387EVM 386EVM QTY QTY 1 1 2 Man fact rer Manufacturer Manufacturer Part Nunber REF DES Description Val e or F Value Function nction 1 Millennium Circuits 6417016A PWB1 PWB PRINTED WIRING BOARD 1 1 Sprague 592D686X9010R2T C1 Capacitor, SMT, tantalum 10 V, ±10%, 68 µF, low ESR, Case code R 3 1 1 Sprague 592D106X9016C2T C2 Capacitor, SMT, tantalum 16 V, ±10%, 10 µF, Case code C 4 1 1 AVX 12063G105ZATRA C3 Capacitor, SMT, Y5V 25V, 80/–20%, 1 µF, 1206 PCKG 5 1 1 AVX 1
Schematic Diagrams 620201 and 6420202 A.