Datasheet
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_
+
V
ROUT
10 pF
500 Ω
R
OUT
R
IN–
R
IN+
1.2 V
EN
EN
Inputs
V
TEST
V
TEST
V
RIN+
EN
EN
V
ROUT
V
TEST
V
RIN+
EN
EN
V
ROUT
t
PZL
t
PLZ
t
PZL
t
PLZ
t
PZH
t
PHZ
t
PZH
t
PHZ
2.5 V
1 V
2 V
1.4 V
0.8 V
2 V
1.4 V
0.8 V
2.5 V
1.4 V
VOL +0.5 V
VOL
0 V
1.4 V
2 V
1.4 V
0.8 V
2 V
1.4 V
0.8 V
VOH –0.5 V
VOH
1.4 V
0 V
SN65LVDS348 , SN65LVDT348
SN65LVDS352 , SN65LVDT352
SLLS523E – FEBRUARY 2002 – REVISED MAY 2004
A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, signaling rate = 500
kHz, duty cycle = 50 ±2%, C
L
includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T and is
±20%.
Figure 4. 348 Enable/Disable Time Test Circuit and Waveforms
10
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