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B
A
G
G
V
O
±
500 Ω
V
TEST
10 pF
(see Note B)
1.2 V
t
PZL
t
PLZ
t
PZL
t
PLZ
t
PZH
t
PHZ
t
PZH
t
PHZ
2.5 V
1 V
2 V
1.4 V
0.8 V
2 V
1.4 V
0.8 V
2.5 V
1.4 V
V
OL
+ 0.5 V
V
OL
0
1.4 V
2 V
1.4 V
0.8 V
2 V
1.4 V
0.8 V
V
OH
V
OH
- 0.5 V
1.4 V
0
V
TEST
A
G, 1,2EN,
or 3,4EN
G
Y
V
TEST
A
G
Y
Inputs
(see Note A)
1,2EN or 3,4EN
G, 1,2EN,
or 3,4EN
SN55LVDS32 , SN65LVDS32
SN65LVDS3486 , SN65LVDS9637
SLLS262Q – JULY 1997 – REVISED JULY 2007
A. All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, pulse repetition
rate(PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns.
B. C
L
includes instrumentation and fixture capacitance within 6 mm of the D.U.T.
Figure 4. Enable- and Disable-Time Test Circuit and Waveforms
10
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