Datasheet

SN65LVDS315
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SLLS881F DECEMBER 2007REVISED SEPTEMBER 2012
TYPICAL CHARACTERISTICS (continued)
SN65LVDS315 OUTPUT DATA AND CLOCK SIGNAL AT
208MBPS SN65LVDS315 OUTPUT CLOCK AND DATA
A. The asymmetrical setup and hold time is optimized to meet OMAP A. Through pcb interconnect of 80-inch of FR4 at 208Mbps
processor input timing.
Figure 24. Figure 25.
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