Datasheet

Applying an Input
2-3
Setup and Equipment Required
2.2 Applying an Input
When using a general-purpose signal generator with 50-Ω output impedance,
make sure that the signal levels are between 0 V and 4 V with respect to J12,
device under test ground (DUT GND), designated as VEE.
Inputs should be applied to the SMA connectors J1, J2, J5, and J6. Matched
cable lengths must be used when connecting the signal generator to the EVM
to avoid inducing skew between the noninverting and inverting inputs. The
EVM comes with 100-Ω resistors installed across the differential inputs for
LVDS termination. The simple 100-Ω terminations do not provide the
necessary termination for LVPECL or CML
[1]
output structures. In order to
interface the SN65LVDS122 EVM with CML or LVPECL drivers, external
terminations are required. Figure 2–2 shows an example termination for
LVPECL and CML output structures. Remove resistors R8 and R10 when
using the external terminations.
Figure 2–2. External Termination for Interfaceing CML or LVPECL Drivers
LVPECL or CML
Driver
EVM (INPUT 1 or 2)
AA
B
50 Ω
50 Ω
VT for LVPECL
V
CC
for CML
VT for LVPECL
V
CC
for CML
The use of external resistors creates a significant stub between the
termination and the actual device receivers. The user needs to verify that the
transition time of the input signal, coupled with the stub length, does not lead
to reflection problems. In normal applications, the termination would be placed
as close as possible to the device inputs to minimize reflections.
The control lines S0 and S1 can be stimulated by an external 50-Ω source, via
jumpers W1 and W2. These control signals are LVTTL compatible inputs and
therefore the external source should provide LVTTL inputs relative to J12. If
S0 and S1 are controlled by an external source, then remove the jumpers from
W3 and W4 and install 50-Ω resistors R2 and R3.
[1
]CML is not a standardized physical layer and therefore the output structures and required termination differ from vendor to
vendor.