Datasheet

Overview
2-2
2.1 Overview
TIA/EIA–644 specifies the LVDS driver output characteristics such that it
maintains at least 247 mV across a 100-Ω differential load. This requirement
includes the effects of up to 32 standard receivers with their ground reference
up to 1 V different from that of the driver. This common-mode loading limitation
of LVDS drivers affects how they are observed and much of the test set up that
follows. By using three power jacks (J10, J11, and J12), different methods of
termination or probing the output characteristics can be observed without
exceeding the common-mode drive capability. Figure 2–1 shows the typical
setup for the SN65LVDS122EVM.
Figure 2–1. EVM Power Connections for SN65LVDS122 Evaluation
J1
J2
J5
J6
SN65LVDS122 EVM
Power Supply #1
+
3.3 V
–
Power Supply #2
+
1.2 V
–
CH1
CH2
CH3
CH4
Oscilloscope
OUTPUT1
OUTPUT2
/OUTPUT2
/OUTPUT1
Pattern Generator
J10
J11
J12
J3
J4
J7
J8
50 Ω
50 Ω
50 Ω
50 Ω
R8
100 Ω
R10
100 Ω
GND
(EVM GND)
V
EE
(DUT GND)
V
CC