Datasheet

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ELECTRICAL CHARACTERISTICS
SN65LVDS109
SN65LVDS117
SLLS369F – AUGUST 1999 – REVISED FEBRUARY 2005
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
ITH+
Positive-going differential input voltage threshold 100
See Figure 1 and Table 2 mV
V
ITH-
Negative-going differential input voltage threshold –100
|V
OD
| Differential output voltage magnitude 247 340 454
R
L
= 100 Ω , V
ID
= ± 100 mV,
mV
Change in differential output voltage magnitude
See Figure 1 and Figure 2
∆ |V
OD
| –50 50
between logic states
1.37
V
OC(SS)
Steady-state common-mode output voltage 1.125 V
5
Change in steady-state common-mode output See Figure 3
∆ V
OC(SS)
–50 50
voltage between logic states
mV
V
OC(PP)
Peak-to-peak common-mode output voltage 50 150
Enabled, R
L
= 100 Ω 46 64
SN65LVDS109
Disabled 6 8
I
CC
Supply current mA
Enabled, R
L
= 100 Ω 85 122
SN65LVDS117
Disabled 6 8
V
I
= 0 V –2 –20
I
I
Input current (A or B inputs) µA
V
I
= 2.4 V –1.2
I
I(OFF)
Power-off input current (A or B inputs) V
CC
= 1.5 V, V
I
= 2.4 V 20 µA
I
IH
High-level input current (enables) V
IH
= 2 V 20 µA
I
IL
Low-level input current (enables) V
IL
= 0.8 V 10 µA
V
OY
or V
OZ
= 0 V ± 24
I
OS
Short-circuit output current mA
V
OD
= 0 V ± 12
I
OZ
High-impedance output current V
O
= 0 V or V
CC
± 1 µA
I
O(OFF)
Power-off output current V
CC
= 1.5 V, V
O
= 3.6 V ± 1 µA
C
IN
Input capacitance (A or B inputs) V
I
= 0.4 sin (4E6 π t) + 0.5 V 5
pF
C
O
Output capacitance (Y or Z outputs) V
I
= 0.4 sin (4E6 π t) + 0.5 V, Disabled 9.4
(1) All typical values are at 25 ° C and with a 3.3-V supply.
5