Datasheet

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3.3 V
33 Ω
A
B
3.3 V
LVDS Receiver
33 Ω
51 Ω
ECL
50 Ω
50 Ω
51 Ω
120 Ω120 Ω
5 V
100 Ω
A
B
5 V
LVDS Receiver
100 Ω
33 Ω
ECL
50 Ω
50 Ω
33 Ω
82 Ω82 Ω
SN65LVDS109
SN65LVDS117
SLLS369F – AUGUST 1999 – REVISED FEBRUARY 2005
APPLICATION INFORMATION (continued)
Figure 21. Low-Voltage Positive Emitter-Coupled Logic (LVPECL)
Figure 22. Positive Emitter-Coupled Logic (PECL)
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