Datasheet

www.ti.com
0
100
200
300
400
500
600
700
0 100 200 300 400 500
Signaling Rate − Mbps
V
CC
= 3.6 V
V
CC
= 3 V
Peak-to-Peak Jitter − ps
T
A
= 25C
0
5
10
15
20
25
30
35
40
45
50
0 100 200 300 400 500
Clock Frequency − MHz
V
CC
= 3.6 V
V
CC
= 3 V
Peak-to-Peak Jitter − ps
T
A
= 25C
SN65LVDS108
SLLS399E – NOVEMBER 1999 – REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
P-P EYE-PATTERN JITTER
vs
PRBS SIGNALING RATE
NOTES: Input: 2
15
PRBS with peak-to-peak jitter < 100 ps at 100 Mbps, all outputs enabled and loaded with differential
100- Ω loads, worst-case output, supply decoupled with 0.1-µF and 0.001-µF ceramic 0603-style capacitors 1 cm from
the device.
Figure 10.
P-P PERIOD JITTER
vs
CLOCK FREQUENCY
NOTES: Input: 50% duty cycle square wave with period jitter < 9 ps at 100 MHz, all outputs enabled and loaded with
differential 100- Ω loads,worst-case output, supply decoupled with 0.1-µF and 0.001- µF ceramic 0603-style capacitors
1 cm from the device.
Figure 11.
9