Datasheet

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DESCRIPTION (CONTINUED)
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
300 kΩ300 kΩ
V
CC
7 V 7 V
A
Input
B
Input
7 V
300 kΩ
50 Ω
V
CC
EN and
A (’LVDS105)
Input
V
CC
5 Ω
7 V
Y or Z
Output
10 kΩ
SN65LVDS104
SN65LVDS105
SLLS396F – SEPTEMBER 1999 – REVISED JANUARY 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
The SN65LVDS104 and SN65LVDS105 are characterized for operation from –40 ° C to 85 ° C.
The SN65LVDS104 and SN65LVDS105 are members of a family of LVDS repeaters. A brief overview of the
family is provided in the table below.
Selection Guide to LVDS Repeaters
DEVICE NO. INPUTS NO. OUTPUTS PACKAGE COMMENT
SN65LVDS22 2 LVDS 2 LVDS 16-pin D Dual multiplexed LVDS repeater
SN65LVDS104 1 LVDS 4 LVDS 16-pin D 4-Port LVDS repeater
SN65LVDS105 1 LVTTL 4 LVDS 16-pin D 4-Port TTL-to-LVDS repeater
SN65LVDS108 1 LVDS 8 LVDS 38-pin DBT 8-Port LVDS repeater
SN65LVDS109 2 LVDS 8 LVDS 38-pin DBT Dual 4-port LVDS repeater
SN65LVDS116 1 LVDS 16 LVDS 64-pin DGG 16-Port LVDS repeater
SN65LVDS117 2 LVDS 16 LVDS 64-pin DGG Dual 8-port LVDS repeater
Function Tables
(1)
SN65LVDS104 SN65LVDS105
INPUT OUTPUT INPUT OUTPUT
V
ID
= V
A
- V
B
xEN xY xZ A ENx xY xZ
X X Z Z L H L H
X L Z Z H H H L
V
ID
≥ 100 mV H H L Open H L H
–100 mV < V
ID
< 100 mV H ? ? X L Z Z
V
ID
≤ –100 mV H L H X X Z Z
(1) H = high level, L = low level, Z = high impedance, ? = indeterminate, X = don't care
2