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GND

SN65LVDS1050PW

(Marked as DL1050 or LDS1050)

(TOP VIEW)

DRIVER FUNCTION TABLE

RECEIVER FUNCTION TABLE

INPUTS OUTPUTS

INPUTS OUTPUT

DE Y

= V

- V

≥ 100 mV

-100 mV < V

< 100 mV

≤ -100 mV

Open

L L

H H

H HL

H = high level, L = low level, Z = high impedance,

X = don’t care

H = high level, L = low level, Z = high impedance,

X = don’t care

SN65LVDS1050

SLLS343B– APRIL 1999– REVISED APRIL 2003

HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS

FEATURES

• Typically Meets or Exceeds ANSI

TIA/EIA-644-1995 Standard

• Operates From a Single 2.4-V to 3.6-V Supply

• Signaling Rates up to 400 Mbit/s

• Bus-Terminal ESD Exceeds 12 kV

• Low-Voltage Differential Signaling With Typi-

cal Output Voltages of 285 mV and a 100-Ω

Load

• Propagation Delay Times

• Driver: 1.7-ns Typical

•Receiver:3.7-nsTypical

• Driver: 25-mW Typical

• Receiver: 60-mW Typical

• Power Dissipation at 200 MHz

• Driver: 25-mW Typical

• Receiver: 60-mW Typical

• LVTTL Input Levels Are 5-V Tolerant

• Receiver Maintains High Input Impedance

• Receiver Has Open-Circuit Fail Safe

• Available in Thin Shink Outline Packaging

With 20-mil Lead Pitch

DESCRIPTION

The SN65LVDS1050 is similar to the SN65LVDS050

except that it is characterized for operation with a lower

supply voltage range and packaged in the thin shrink

outline package for portable battery-powered appli-

cations.

The differential line drivers and receivers use low-voltage differential signaling (LVDS) to achieve signaling rates as

high as 400 Mbps. The drivers provide a minimum differential output voltage magnitude of 247 mV into a 100-Ω load

and receipt of 100-mV signals with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of this device and signaling technique is for point-to-point baseband data transmission

over controlled impedance media of approximately 100-Ω characteristic impedance. The transmission media may

be printed-circuit board traces, backplanes, or cables. Note: The ultimate rate and distance of data transfer is

dependent upon the attenuation characteristics of the media, the noise coupling to the environment and other

application-specific characteristics.

The SN65LVDS1050 is characterized for operation from -40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily in-

cludetestingofallparameters.

Summary of content (22 pages)

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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS FEATURES • • • • • • Typically Meets or Exceeds ANSI TIA/EIA-644-1995 Standard Operates From a Single 2.4-V to 3.6-V Supply Signaling Rates up to 400 Mbit/s Bus-Terminal ESD Exceeds 12 kV Low-Voltage Differential Signaling With Typical Output Voltages of 285 mV and a 100-Ω Load Propagation Delay Times • Driver: 1.7-ns Typical • • • • Receiver: 3.
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SN65LVDS1050 www.ti.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT Supply voltage range, VCC (2) -0.5 V to 4 V Voltage range (D, R, DE, RE) -0.5 V to 6 V Voltage range (Y, Z, A, and B) -0.
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SN65LVDS1050 www.ti.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 DRIVER SWITCHING CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER tPLH TEST CONDITIONS MIN Propagation delay time, low-to-high-level output TYP (1) M 1.7 2.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 PARAMETER MEASUREMENT INFORMATION DRIVER IOY Driver Enable Y II A IOZ VOD V VOY Z VI OY V OZ 2 VOC VOZ Figure 1. Driver Voltage and Current Definitions Driver Enable Y 100 Ω ±1% VOD Input Z CL = 10 pF (2 Places) 2V 1.4 V 0.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 49.9 Ω, ±1% (2 Places) Driver Enable 3V Y Input 0V Z VOC VOC(PP) CL = 10 pF (2 Places) VOC(SS) VOC All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns . CL includes instrumentation and fixture capacitance within 0,06 mm of the D.U.T.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 RECEIVER A V IA V IB VID 2 R VIA VIC B VO VIB Figure 5. Receiver Voltage Definitions Table 1. Receiver Minimum and Maximum Input Threshold Test Voltages APPLIED VOLTAGES (V) RESULTING DIFFERENTIAL INPUT VOLTAGE (mV) RESULTING COMMON-MODE INPUT VOLTAGE (V) VIA VIB VID VIC 1.25 1.15 100 1.2 1.15 1.25 100 1.2 2.4 2.3 100 2.35 2.3 2.4 100 2.35 0.1 0 100 0.05 0 0.1 100 0.05 1.5 0.9 600 1.2 0.9 1.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 VID VIA VIB CL 10 pF VO VIA 1.4 V VIB 1V VID 0.4 V 0V –0.4 V tPHL VO tPLH VOH 2.4 V 1.4 V 0.4 V VOL tf tr All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, pulse repetition rate (PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns. CL includes instrumentation and fixture capacitance within 0,06 m of the D.U.T. Figure 6.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 B 1.2 V 500 Ω A Inputs CL 10 pF RE + – VO VTEST All input pulses are supplied by a generator having the following characteristics: tr or tf≤ 1 ns, pulse repetition rate (PRR) = 0.5 Mpps, pulse width = 500 ± 10 ns. CL includes instrumentation and fixture capacitance within 0,06 m of the D.U.T. 2.5 V VTEST A 1V 2V 1.4 V RE 0.8 V tPZL tPZL tPLZ 2.5 V 1.4 V R VOL +0.5 V VOL 0V VTEST A 1.4 V 2V RE 1.4 V 0.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 TYPICAL CHARACTERISTICS RECEIVER DISABLED DRIVER OUTPUT CURRENT vs OUTPUT VOLTAGE DRIVER LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 4 VOZ = 0 VCC = 3.3 V, TA = 25°C, DR at 0 V 20 VOL - Low-Level Output Voltage - V I O - Disabled Driver Output Current - mA 25 15 10 5 VOZ = 1.2 0 VOZ = 2.4 -5 -10 VCC = 2.4 V TA = 25°C 3 2 1 -15 -20 0 0.5 1 1.5 2 2.5 0 3 0 VO - Output Voltage - V 2 3 Figure 8. Figure 9.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 RECEIVER HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT DRIVER HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 2.5 t PLH - High-To-Low Propagation Delay Time - ns 3 VOH - High-Level Output Voltage - V VCC = 2.4 V TA = 25°C 2 1 0 -50 -40 -10 -30 -20 IOH - High-Level Output Current - mA Figure 12. 12 0 2 VCC = 3.3 V VCC = 2.7 V VCC = 3.6 V 1.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 RECEIVER HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME vs FREE-AIR TEMPERATURE 2 VCC = 3.3 V VCC = 2.7 V VCC = 3.6 V 1.5 -50 -30 -10 10 50 30 70 TA - Free-Air Temperature - °C 90 4.5 VCC = 3.3 V 4 VCC = 2.7 V 3.5 VCC = 3.6 V 3 2.5 -50 -30 10 -10 50 30 70 TA - Free-Air Temperature - °C Figure 14. 90 Figure 15.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 APPLICATION INFORMATION The devices are generally used as building blocks for high-speed point-to-point data transmission. Ground differences are less than 1 V with a low common-mode output and balanced interface for very low noise emissions. Devices can interoperate with RS-422, PECL, and IEEE-P1596. Drivers/Receivers maintain ECL speeds without the power and dual supply requirements.
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SN65LVDS1050 www.ti.com SLLS343B – APRIL 1999 – REVISED APRIL 2003 VCC 300 kΩ 300 kΩ A Rt 100 Ω Typ Y B VIT ≈ 2.3 V Figure 18. Open-Circuit Fail Safe of the LVDS Receiver It is only under these conditions that the output of the receiver is valid with less than a 100-mV differential input voltage magnitude. The presence of the termination resistor, Rt, does not affect the fail-safe function as long as it is connected as shown in the figure.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN65LVDS1050PWR Package Package Pins Type Drawing TSSOP PW 16 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65LVDS1050PWR TSSOP PW 16 2000 367.0 367.0 35.
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