Datasheet

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Pulse
Generator
1.5 V
80 %
20 %
80 %
20 %
t
0 V*
0 V
0 V
1.5 V
0 V**Differential
*
*
*
Oscilloscope
50 Ω
D
OUT+
C1
C2
D
OUT-
D
IN
50 Ω
50 Ω
* Matched 50  Cables,
C = 15 pF Distributed
Blocking Capacitors
C1 = C2 = 50 nF
t
PLHD
t
PLLD
3 V
0 V
V
OH
V
OL
V
OD
= D
OUT+
- D
OUT-
t
r
t
f
D
IN
D
OUT-
D
OUT+
V
OD
* Matched 50 Ω Cables,
C = 15 pF Distributed
Pulse
Generator
2.4 V
Oscilloscope
50 Ω
50 Ω
50 Ω
*
*
950 Ω
950 Ω
1 kΩ
1 kΩ
*
V
CC
GND
D
OUT-
D
IN
EN or EN
D
OUT+
100 Ω
1.5 V
50 %
1.5 V
V
OH
V
OL
0 V
3 V
1.5 V 1.5 V
0 V
3 V
50 %
50 %
50 %
1.2 V
1.2 V
t
PHZ
t
PZH
t
PLZ
t
PZL
EN When EN
= GND or Open
D
OUT+
When D
IN
= GND
D
OUT-
When D
IN
= V
CC
EN
When EN = V
CC
D
OUT-
When D
IN
= GND
D
OUT+
When D
IN
= V
CC
SN65LVDS049
SLLS575–AUGUST 2003
Figure 2. Driver Propagation Delay and Rise/Fall Time Test Circuit and Waveforms
Figure 3. Driver High-Impedance State Delay Test Circuit and Waveforms
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