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V
ID
Y
Z
A
V
O
V
IZ
I
IZ
I
O
V
IY
I
IY
V
IC
(V
IY IZ
+V )/2
V
ID
V
O
V
IZ
V
IY
C
L
= 10 pF
t
pHL
t
pLH
t
f
t
r
80%
20%
V
IY
V
IZ
V
ID
V
O
1.4 V
1 V
0.4 V
0 V
–0.4 V
~V
CC
V
CC
/2
~ 0 V
SN65LVDM1676
SN65LVDM1677
SLLS430D – NOVEMBER 2000 – REVISED JUNE 2007
PARAMETER MEASUREMENT INFORMATION (continued)
Figure 6. Voltage Definitions
Table 1. Receiver Minimum and Maximum Input Threshold Test Voltages
RESULTING DIFFERENTIAL RESULTING COMMON-
APPLIED VOLTAGES
INPUT VOLTAGE MODE INPUT VOLTAGE
V
IY
V
IZ
V
ID
V
IC
1.25 V 1.15 V 100 mV 1.2 V
1.15 V 1.25 V –100 mV 1.2 V
2.4 V 2.3 V 100 mV 2.35 V
2.3 V 2.4 V –100 mV 2.35 V
0.1 V 0 V 100 mV 0.05 V
0 V 0.1 V –100 mV 0.05 V
1.5 V 0.9 V 600 mV 1.2 V
0.9 V 1.5 V –600 mV 1.2 V
2.4 V 1.8 V 600 mV 2.1 V
1.8 V 2.4 V –600 mV 2.1 V
0.6 V 0 V 600 mV 0.3 V
0 V 0.6 V –600 mV 0.3 V
NOTE: All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤ 1 ns, pulse repetition rate
(PRR) = 0.5 Mpps, pulse width = 10 ± 0.2 ns. C
L
includes instrumentation and fixture capacitance within 0,06 m of
the D.U.T.
Figure 7. Timing Test Circuit and Waveforms
10
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