Datasheet

V
ODB(PP)
V
ODPE(PP)
SN65LVCP408
SLLS842A –JUNE 2009 –REVISED JUNE 2010 www.ti.com
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
DIFFERENTIAL INPUTS
Positive going differential
V
IT+
50 mV
input high threshold
Negative going differential
V
IT–
–50 mV
input low threshold
A
(EQ)
Equalizer gain at 1.875 GHz (EQ=1) 9 dB
Termination resistance,
R
T(D)
80 100 120 Ω
differential
Open-circuit Input voltage
V
BB
AC-coupled inputs 1.6 V
(input self-bias voltage)
Biasing network dc
R
(BBDC)
30 kΩ
impedance
375 MHz 42
Biasing network ac
R
(BBAC)
Ω
impedance
2.125 GHz 8.4
DIFFERENTIAL OUTPUTS
V
ODH
High-level output voltage 650 mV
PP
V
ODL
Low-level output voltage –650 mV
PP
R
L
= 100 Ω ±1%, Pre-Emph=0 dB
Output differential voltage
V
ODB
1000 1300 1500 mV
PP
without preemphasis
(2)
V
OCM
Output common mode voltage 1.8 V
Change in steady-state
See Figure 2
ΔV
OC(SS)
common-mode output voltage 1 mV
between logic states
Output preemphasis voltage 0
ratio,
3
R
L
= 100 Ω ±1%; x = L or S;
V
(PE)
dB
6
See Figure 3
10
Output preemphasis is set to 10 dB during test
Preemphasis duration
t
(PRE)
Measured with a 100-MHz clock signal; 175 ps
measurement
R
L
= 100 Ω ±1%, See Figure 4
Differential on-chip termination between OUT+ and
r
o
Output resistance 100 Ω
OUT–
CONTROL INPUTS
I
IH
High-level Input current VIN = VCC 5 mA
I
IL
Low-level Input current VIN = GND -125 -90 mA
R
(PU)
Pullup resistance 35 kΩ
POWER CONSUMPTION
P
D
Device power dissipation All outputs terminated 100 Ω 1.52 W
PRBS 2
7-1
Device power dissipation in
P
Z
All outputs in 3-state pattern at 4.25 864 mW
3-State
Gbps
I
CC
Device current consumption All outputs terminated 100 Ω 440 mA
(1) All typical values are at T
A
= 25°C and V
CC
= 3.3 V supply unless otherwise noted. They are for reference purposes and are not
production tested.
(2) Differential output voltage V
(ODB)
is defined as | OUT+ – OUT– |.
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