Datasheet

SN65LVCP408
www.ti.com SLLS842A –JUNE 2009–REVISED JUNE 2010
Table 6. Switch Control
Bit Function Default Note Access
0= Switch Via I
2
C bit is used to enable the
switch event; 1 = Switch via SWT pin;
When SWT is logic 0, Port Select No. 1
7 Enable Switch Via Pin 0 settings will be used. When SWT is logic
1, the Port Select No. 2 settings will be
R/W
used. The Switch Via i2C setting will be
ignored.
Selects between Port Select No. 1 and
6 Switch Via I
2
C 0 No. 2 when enable Switch Via Pin is 0. 0=
Port Select No. 1, 1=Port Select No. 2
5 RSVD 0 Reserved
4 RSVD 0 Reserved
3 RSVD 0 Reserved
R
2 RSVD 0 Reserved
1 RSVD 0 Reserved
0 RSVD 0 Reserved
Table 7. Reserved for TI Use
Bit Function Default Note Access
7:0 RSVD - Read only value is indeterministic R
Switching Options
For each output port, users can select two possible input port selection profiles (i.e. sources that indicate which
input port to use for the ouput). Input port select No. 1 I
2
C™ register bits are used to select the configuration of
each output port that is used for default operation. (Note: on power up and after resetting the I2C register space
with the RESN pin, each output port is mapped to its matching input port. For example, output port 0 is mapped
to input port 0, and output port 1 is mapped to input port 1, etc.). Input Port Select No. 2 registers are used to
select the secondary output port configuration that is used when the switch event is triggered.
Triggering Switch Event
Switching between the active output port configuration and the secondary output port configuration (configuration
selected with Input Port Select No 2 registers) is accomplished in two ways:
1. The switch event can be triggered using the I
2
C register bit Switch Via I
2
C and setting it to 1 (high).
2. If the switch event needs to occur faster than the I
2
C access allows, then users have the option to use the
SWT pin (pin #62) to trigger the switch from port configuration No. 1 to port configuration No. 2. For this
option, users should set the Enable Switch Via I
2
C register bit to 1 upon initial start up. The SWT pin should
be logic high state to initiate the switch. Changing the logic states of the SWT pin causes the port
configurations to move between the two port configuration options.
APPLICATION INFORMATION
BANDWIDTH REQUIREMENTS
Error free transmission of data over a transmission line has specific bandwidth demands. It is helpful to analyze
the frequency spectrum of the transmit data first. For an 8B10B coded data stream at 3.75 Gbps of random data,
the highest bit transition density occurs with a 1010 pattern (1.875 GHz). The least transition density in 8B10B
allows for five consecutive ones or zeros. Hence, the lowest frequency of interest is 1.875 GHz/5 = 375 MHz.
Real data signals consist of higher frequency components than sine waves due to the fast rise time. The faster
the rise time, the more bandwidth becomes required. For 80-ps rise time, the highest important frequency
component is at least 0.6/(p × 80 ps) = 2.4 GHz. Figure 27 shows the Fourier transformation of the 375-MHz
and 1.875-GHz trapezoidal signal.
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