Datasheet

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
SLLS500A − MAY 2001 − REVISED MARCH 2005
6
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PARAMETER MEASUREMENT INFORMATION
I
O
I
O
V
OD
V
OC
I
I
V
O
27 Ω
V
O
50 pF
†
27 Ω
0 V or 3 V
†
Includes probe and jig capacitance
Figure 1. Driver Test Circuit, V
OD
and V
OC
Without Common-Mode Loading
375 Ω
V
TEST
= −7 V to 12 V
V
OD
Input
60 Ω
375 Ω
V
TEST
Figure 2. Driver Test Circuit, V
OD
With Common-Mode Loading
V
OD
R
L
= 54 Ω
50 Ω
Signal
Generator
{
C
L
= 50 pF
}
90%
Output
0 V
10%
t
f
t
r
Input
0 V
3 V
t
PHL
1.5 V
t
PLH
90%
10%
V
OD(H
)
V
OD(L
)
1.5 V
†
PRR = 1 MHz, 50% duty cycle, t
r
< 6 ns, t
f
< 6 ns, Z
o
= 50 Ω
‡
Includes probe and jig capacitance
Figure 3. Driver Switching Test Circuit and Waveforms
V
OC(PP)
∆V
OC(SS)
V
OC
Figure 4. V
OC
Definitions