Datasheet
SLLS170E − OCTOBER 1993 − REVISED AUGUST 2000
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
†
MAX UNIT
V
IT+
Positive-going input threshold voltage I
O
= −8 mA 0.2 V
V
IT−
Negative-going input threshold voltage I
O
= 8 mA −0.2 V
V
hys
Hysteresis voltage (V
IT+
− V
IT−
) 45 mV
V
IK
Enable input clamp voltage I
I
= −18 mA −0.9 −1.5 V
V
OH
High-level output voltage V
ID
= 200 mV, I
OH
= −8 mA 3.5 4.5 V
V
OL
Low-level output voltage V
ID
= −200 mV, I
OL
= 8 mA 0.3 0.5 V
I
OZ
High-impedance-state output current V
O
= 0 V to V
CC
± 20 µA
V
IH
= 12 V, V
CC
= 5 V, Other inputs at 0 V 0.7 1
I
I
Bus input current
A or B inputs
V
IH
= 12 V, V
CC
= 0 V, Other inputs at 0 V 0.8 1
mA
I
I
Bus input current A or B inputs
V
IH
= −7 V, V
CC
= 5 V, Other inputs at 0 V −0.5 −0.8
mA
V
IH
= −7 V, V
CC
= 0 V, Other inputs at 0 V −0.4 −0.8
I
IH
High-level input current V
IH
= 5 V ± 20 µA
I
IL
Low-level input current V
IL
= 0 V −20 µA
I
OS
Short-circuit output current V
O
= 0 −80 −120 mA
I
CC
Supply current
Outputs enabled, I
O
= 0, V
ID
= 5 V 11 20
mA
I
CC
Supply current
Outputs disabled 0.9 1.4
mA
†
All typical values are at V
CC
= 5 V and T
A
= 25°C.
switching characteristics, V
CC
= 5 V, C
L
= 15 pF, T
A
= 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PHL
Propagation delay time, high- to low-level output
V
ID
= −1.5 V to 1.5 V, See Figure 1
11 22 30 ns
t
PLH
Propagation delay time, low- to high-level output
V
ID
= −1.5 V to 1.5 V, See Figure 1
11 22 30 ns
t
PZH
Output enable time to high level See Figure 2 17 30 ns
t
PZL
Output enable time to low level See Figure 3 18 30 ns
t
PHZ
Output disable time from high level See Figure 2 35 45 ns
t
PLZ
Output disable time from low level See Figure 3 25 40 ns
t
sk(p)
Pulse skew (|t
PHL
− t
PLH
|) See Figure 2 0.5 6 ns
t
t
Transition time See Figure 1 5 10 ns