Datasheet

APPLICATION INFORMATION
System-Level EMC
V
CC
IP0–IP7
GND
GND
D
2
D
S
D
1
R
1
R
IN
C
1
C
IN
V
SUP
=24V
C
S
C
S
0V
IPx
0V
FE
FE
SN65HVS882
D
2
D
S
D
1
R
1
R
IN
C
1
C
IN
C
S
Superrectifier:BYM10-1000or
Generalpurposerectifier:1N4007
39-Vtransientvoltagesuppressor,SM15T39CA
33–36-VfastZenerdiode,ZSMB36
56- ,1/3-WMELFresistorΩ
1.2-kΩ,1/4-WMELFresistor
10- F,60-Vceramiccapacitorμ
22-nF,60-V ceramiccapacitor
4.7-nF,2-kVpolypropylenecapacitor
Input Channel Switching for IEC61131-2 PLC Applications
30
25
20
15
10
5
0
–3
5
10 15
30
25
20
15
10
5
0
-–3
5
10 15
I (mA)
IN
V (V)
IN
V (V)
IN
V
(V)
IN
I (mA)
IN
I (mA)
IN
30
25
20
15
10
5
0
–3
5
10 1520 25 30
Type1
Type2 Type3
OFF
ON
OFFOFF
ONON
0
00
SN65HVS882
www.ti.com ........................................................................................................................................................................................................ SLAS601 – MAY 2008
The SN65HVS882 is designed to operate reliably in harsh industrial environments. At a system level, the device
is tested according to several international electromagnetic compatibility (EMC) standards. In addition to the
device internal ESD structures, external protection circuitry, as shown in Figure 15 , can be used to absorb as
much energy from burst- and surge-transients as possible.
Figure 15. Typical EMC Protection Circuitry for Supply and Signal Inputs
The input stage of the SN65HVS882 is designed so that with a 24-V supply on V
CC
and an input resistor R
IN
=
1.2 k Ω , the trip point for signaling an ON-condition is at 9.4 V at 3.6 mA. This trip point satisfies the switching
requirements of IEC61131-2 type-1 and type-3 switches.
Figure 16. Switching Characteristics for IEC1131-2 Type 1, 2, and 3 Proximity Switches
For a type-2 switch application two inputs are connected in parallel. The current limiters then add to a total
maximum current of 7.2 mA. While the return-path (RE-pin), of one input might be used to drive an indicator
LED, the RE-pin of the other input channel should be connected to ground (GND).
Paralleling input channels reduces the number of available input channels from an octal Type 1 or Type 3 input
to a quad Type 2 input device. Note, that in this configuration output data of an input channel is represented by
two shift register bits.
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