Datasheet

APPLICATION INFORMATION
System-Level EMC
V 24
IP0 – IP7
FGND
SN65 HVS 880
V
SUP
= 24 V
INx
0 V
R
IN
C
IN
C
HV
FE
C
B
C
C
D
Z
R
S
D
RP
C
C
D
TSC
HV
C
C
R
S
D
TS
R
IN
C
IN
C
HV
33 V – 36 VfastZenerDiode, Z2SMB36
1 µF - 10 µF, 60 VCeramicCapacitor
1.2 kΩ, 1/4 WMELFResistor
nx220nF,60VCeramicCapacitors
4.7 nF, 2 kVCeramicCapacitor
39V TransientVoltageSuppressor: SM15T39CA
SuperRectifier: BYM10-1000, or
GeneralPurposerectifier: 1N4007
56 Ω, 1/3 WMELFResistor
D
Z
C
B
D
RP
22 nF, 60 VCeramicCapacitor
C
C
Input Channel Switching Characteristics
30
25
20
15
10
5
0
–3
5
10 15
30
25
20
15
10
5
0
-–3
5
10 15
I (mA)
IN
V (V)
IN
V (V)
IN
V
(V)
IN
I (mA)
IN
I (mA)
IN
30
25
20
15
10
5
0
–3
5
10 1520 25 30
Type1
Type2 Type3
OFF
ON
OFFOFF
ONON
0
00
SN65HVS880
SLAS592C – MARCH 2008 – REVISED NOVEMBER 2008 ............................................................................................................................................... www.ti.com
The SN65HVS880 must operate reliably in harsh industrial environments. At a system level, the device is tested
according to several international electromagnetic compatibility (EMC) standards.
In addition to the device internal ESD structures, external protection circuitry, such as the one in Figure 17 , is
needed to absorb as much energy from burst- and surge-transients as possible.
Figure 17. Typical EMC Protection Circuitry for Supply and Signal Inputs
The input stage of the HVS880 is so designed, that for an input resistor R
IN
= 1.2 k Ω the trip point for signalling
an ON-condition is at 9.4 V at 3.6 mA. This trip point satisfies the switching requirements of IEC61131-2 Type 1
and Type 3 switches.
Figure 18. Switching Characteristics for IEC61131-2 Type 1, 2, and 3 Proximity Switches
For a Type 2 switch application, two inputs are connected in parallel. The current limiters then add to a total
maximum current of 7.2 mA. While the return-path (RE-pin), of one input might be used to drive an indicator
LED, the RE-pin of the other input channel should be connected to ground (FGND).
Paralleling input channels reduces the number of available input channels from an octal Type 1 or Type 3 input
to a quad Type 2 input device. Note, that in this configuration output data of an input channel is represented by
two shift register bits.
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Product Folder Link(s): SN65HVS880