Datasheet

+
_
DUT
TXD
STB
RXD
V
I
C
L
CANH
CANL
V
O
50%
50%
50%
V
IO
0V
V
OL
TXDInput
RXDOutput
t
loop2
t
loop1
15pF±20%
60
±1%
W
V
IO
STB
CANH
V
I
TXD
(See Note B)
R
L
= 60 W
± 1%
C
L
(See Note A)
V
OD
t
dom
V
I
900 mV
V
OD
500 mV
V
IO
0 V
V
OD(D)
0 V
CANL
TXD
CANH
CANL
STB
V
in
V
in
0 V
0 V
12 V
-12 V
or
0 V
0 V or V
IO
V
IN
I
OS
-12 V or 12 V
|I
OS(SS)
|
200 µs
10 µs
SN65HVDA540
SN65HVDA541
SLLS981 – MAY 2009 ........................................................................................................................................................................................................ www.ti.com
A. C
L
= 100 pF includes instrumentation and fixture capacitance within ± 20%.
B. All V
I
input pulses are from 0 V to V
IO
and supplied by a generator having the following characteristics: t
r
or t
f
≤ 6 ns.
Pulse Repetition Rate (PRR) = 125 kHz, 50% duty cycle.
Figure 11. t
(LOOP)
Test Circuit and Waveform
A. C
L
= 100 pF includes instrumentation and fixture capacitance within ± 20%.
B. All V
I
input pulses are from 0 V to V
IO
and supplied by a generator having the following characteristics: t
r
or t
f
≤ 6 ns.
Pulse Repetition Rate (PRR) = 500 Hz, 50% duty cycle.
Figure 12. Dominant Time-Out Test Circuit and Waveforms
Figure 13. Driver Short-Circuit Current Test and Waveforms
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Product Folder Link(s): SN65HVDA540 SN65HVDA541