Datasheet

SN65HVDA1050A-Q1
www.ti.com
SLLS994A FEBRUARY 2010REVISED DECEMBER 2010
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating conditions, T
A
= –40 to 125°C (unless otherwise noted)
NO. PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
S Pin
10.1 V
IH
High-level input voltage, S input 2 V
10.2 V
IL
Low-level input voltage, S input 0.8 V
10.3 I
IH
High level input current S at 2 V 20 40 70 µA
10.4 I
IL
Low level input current S at 0.8 V 5 20 30 µA
SPLIT (V
REF
) Pin
11.1 –50 µA < I
O
< 50 µA (V
REF
) 0.4 V
CC
0.5 V
CC
0.6 V
CC
V
O
Output voltage V
11.2 –500 µA < I
O
< 500 µA (SPLIT) 0.3 V
CC
0.5 V
CC
0.7 V
CC
V
CC
= 0 V, –12 V V
SPLIT
11.3 I
LKG
Leakage current, unpowered –5 5 µA
12 V
THERMAL CHARACTERISTICS
over recommended operating conditions, T
A
= –40 to 125°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
12.1 Low-K thermal resistance
(2)
211
Junction-to-air thermal
q
JA
°C/W
resistance
(1)
12.2 High-K thermal resistance
(2)
131
Junction-to-board
12.3 q
JB
53 °C/W
thermal resistance
Junction-to-case thermal
12.4 q
JC
79 °C/W
resistance
V
CC
= 5 V, T
J
= 27°C, R
L
= 60 , S = 0 V,
12.5 Input to TXD at 500 kHz, 50% duty cycle square wave, 112
CL at RXD = 15 pF
Average power
P
D
mW
dissipation
V
CC
= 5.5 V, T
J
= 130°C, R
L
= 45 , S = 0 V,
12.6 Input to TXD at 500 kHz, 50% duty cycle square wave, 170
CL at RXD = 15 pF
Thermal shutdown
12.7 190 °C
temperature
(1) The junction temperature (T
J
) is calculated using the following T
J
= T
A
+ (P
D
× q
JA
).
(2) Tested in accordance with the Low-K (EIA/JESD51-3) or High-K (EIA/JESD51-7) thermal metric definitions for leaded surface-mount
packages.
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