Datasheet

CANH
CANL
TXD
STB
V
I
V
O(CANH)
V
OC(SS)
R
L
V
O(CANL)
V =
OC
2
V + V
O(CANH) O(CANL)
V
OC
+
_
DUT
TXD
STB
RXD
V
I
(B)
C
L
(A)
CANH
CANL
V
O
0.5V
CC
0.5V
CC
0.5V
CC
V
CC
0V
V
OH
V
OL
TXDInput
RXDOutput
t
loop2
t
loop1
15pF±20%
60
±1%
W
STB
CANL
V
I
(A)
TXD
R
L
= 60 W
±1%
C
L
(B)
V
OD
t
dom
V
I
900 mV
V
OD
500 mV
V
CC
0 V
V
OD(D)
0 V
CANH
SN65HVDA1040A-Q1
www.ti.com SLLS995C –FEBRUARY 2010– REVISED FEBRUARY 2011
NOTE: All V
I
input pulses are from 0 V to V
CC
and supplied by a generator having the following characteristics: t
r
or t
f
≤ 6 ns,
pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
Figure 11. Common-Mode Output Voltage Test and Waveforms
A. C
L
= 100 pF and includes instrumentation and fixture capacitance within ±20%.
B. All V
I
input pulses are from 0 V to V
CC
and supplied by a generator having the following characteristics: t
r
or t
f
≤ 6 ns,
pulse repetition rate (PRR) = 125 kHz, 50% duty cycle.
Figure 12. t
(LOOP)
Test Circuit and Waveforms
A. All V
I
input pulses are from 0 V to V
CC
and supplied by a generator having the following characteristics: t
r
or t
f
≤ 6 ns,
pulse repetition rate (PRR) = 500 Hz, 50% duty cycle.
B. C
L
= 100 pF includes instrumentation and fixture capacitance within ±20%.
Figure 13. Dominant Time-Out Test Circuit and Waveforms
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