Datasheet

SN65HVD82
www.ti.com SLLSED6 –OCTOBER 2012
THERMAL INFORMATION
SN65HVD82
THERMAL METRIC
(1)
UNITS
PACKAGE SOIC
(D)
θ
JA
Junction-to-ambient thermal resistance 116.1
θ
JCtop
Junction-to-case (top) thermal resistance 60.8
θ
JB
Junction-to-board thermal resistance
(2)
57.1
°C/W
ψ
JT
Junction-to-top characterization parameter 13.9
ψ
JB
Junction-to-board characterization parameter 56.5
θ
JCbot
Junction-to-case (bottom) thermal resistance NA
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(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
V
CC
Supply voltage 4.5 5 5.5 V
V
I
Input voltage at any bus terminal (separately or common mode)
(1)
–7 12 V
V
IH
High-level input voltage (D, DE and RE inputs) 2 VCC V
V
IL
Low-level input voltage (D, DE and RE inputs) 0 0.8 V
V
ID
Differential input voltage (A and B inputs) –12 12 V
Output current, Driver –60 60 mA
I
O
Output current, Receiver –8 8 mA
R
L
Differential load resistance 54 60 Ω
C
L
Differential load capacitance 50 pF
1/t
UI
Signaling rate 250 kbps
T
A
Operating free-air temperature (see application section for thermal information) –40 85 °C
T
J
Junction Temperature –40 150 °C
(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
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