Datasheet

SN65HVD72
SN65HVD75
SN65HVD78
www.ti.com
SLLSE11C MARCH 2012REVISED SEPTEMBER 2013
Receiver Failsafe
The differential receiver is “failsafe” to invalid bus states caused by:
open bus conditions such as a disconnected connector
shorted bus conditions such as cable damage shorting the twisted-pair together, or
idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the differential receiver will output a failsafe logic High state so that the output of the
receiver is not indeterminate.
Receiver failsafe is accomplished by offsetting the receiver thresholds so that the “input indeterminate” range
does not include zero volts differential. In order to comply with the RS-422 and RS-485 standards, the receiver
output must output a High when the differential input V
ID
is more positive than +200 mV, and must output a Low
when the V
ID
is more negative than -200 mV. The receiver parameters which determine the failsafe performance
are V
IT+
and V
IT-
and V
HYS
. As seen in the Electrical Characteristics table, differential signals more negative than
-200 mV will always cause a Low receiver output. Similarly, differential signals more positive than +200 mV will
always cause a High receiver output.
When the differential input signal is close to zero, it will still be above the V
IT+
threshold, and the receiver output
will be High. Only when the differential input is more negative than V
IT-
will the receiver output transition to a Low
state. So the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis
value V
HYS
(the separation between V
IT+
and V
IT-
) as well as the value of V
IT+
.
Signals which transition from positive to negative (or from negative to positive) will transition only once, ensuring
no spurious bits.
Low-Power Standby Mode
When both the driver and receiver are disabled (DE transitions to a low state and RE transitions to a high state)
the device enters standby mode. If the enable inputs are in this state for a brief time (that is, less than 100 ns),
the device does not enter standby mode. This prevents inadvertently entering standby mode during
driver/receiver enabling. Only when the enable inputs are held in this state a sufficient duration (that is, for 300
ns or more), the device is assured to be in standby mode. In this low-power standby mode, most internal circuitry
is powered down, and the steady-state supply current is typically about 100 nA. When either the driver or the
receiver is re-enabled, the internal circuitry becomes active.
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