Datasheet

R
RE
DE
D
A
B
Vcc
GND
1
2
3
4
7
6
5
Vcc
10k
10k
XCVR
TVS
R1
R2
TBU1
TBU2
MOV1
MOV2
8
Vcc
0.1μF
RxD
TxD
DIR
MCU
R
RE
DE
D
A
B
Vcc
GND
1
2
3
4
7
6
5
Vcc
10k
10k
XCVR
TVS
R1
R2
8
Vcc
0.1μF
RxD
TxD
DIR
MCU
SN65HVD72
SN65HVD75
SN65HVD78
SLLSE11C –MARCH 2012–REVISED SEPTEMBER 2013 www.ti.com
The implementation of IEC-ESD protection on-chip increases the robustness of equipment significantly, which
most likely experience discharge events due to human contact with connectors and cables. Designers may also
want to implement protection against much longer duration transients, typically referred to as surge transients.
Therefore, Figure 22 suggests two circuit designs that provide protection against light and heavy surge
transients, in addition to ESD and EFT transients. Table 6 presents the associated bill of material.
Table 6. Bill of Materials
Device Function Order Number Manufacturer
XCVR 3.3V, 250kbps RS-485 Transceiver SN65HVD72D TI
R1, R2 10Ω, Pulse-Proof Thick-Film Resistor CRCW060310RJNEAHP Vishay
TVS Bidirectional 400W Transient Suppressor CDSOT23-SM712 Bourns
TBU1, TBU2 Bidirectional. TBU-CA-065-200-WH Bourns
200mA Transient Blocking Unit 200V, Metal-
MOV1, MOV2 MOV-10D201K Bourns
Oxide Varistor
Figure 22. Transient Protections Against ESD, EFT, and Surge Transients
The left circuit provides surge protection of ≥ 500 V transients, while the right protection circuits can withstand
surge transients of 5 kV.
Design and Layout Considerations For Transient Protection
Because ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high-
frequency layout techniques must be applied during PCB design.
In order for your PCB design to be successful start with the design of the protection circuit in mind.
1. Place the protection circuitry close to the bus connector to prevent noise transients from penetrating your
board.
2. Use Vcc and ground planes to provide low-inductance. Note that high-frequency currents follow the path of
least inductance and not the path of least impedance.
3. Design the protection components into the direction of the signal path. Do not force the transients currents to
divert from the signal path to reach the protection device.
4. Apply 100 nF to 220 nF bypass capacitors as close as possible to the Vcc-pins of transceiver, UART,
controller ICs on the board.
5. Use at least two vias for Vcc and ground connections of bypass capacitors and protection devices to
minimize effective via-inductance.
6. Use 1k to 10k pull-up/down resistors for enable lines to limit noise currents in theses lines during transient
events.
7. Insert pulse-proof resistors into the A and B bus lines if the TVS clamping voltage is higher than the specified
maximum voltage of the transceiver bus terminals. These resistors limit the residual clamping current into the
transceiver and prevent it from latching up.
8. While pure TVS protection is sufficient for surge transients up to 1 kV, higher transients require metal-oxide
varistors (MOVs) which reduce the transients to a few hundred volts of clamping voltage, and transient
blocking units (TBUs) that limit transient current to some 200 mA.
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