Datasheet

SN65HVD72
SN65HVD75
SN65HVD78
SLLSE11C –MARCH 2012–REVISED SEPTEMBER 2013 www.ti.com
DEVICE INFORMATION
Table 4. Thermal Information
PARAMETER D DGK DRB Units
SOIC-8 MSOP-8 SON-8
Θ
JA
Junction-to-Ambient Thermal Resistance 110.7 168.7 40.0 °C/ W
Θ
JB
Junction-to-Board Thermal Resistance 51.3 89.5 15.5
Θ
JC(top)
Junction-to-Case(top) Thermal Resistance 54.7 62.2 49.6
Θ
JC(top)
Junction-to-Case(top) Thermal Resistance n/a n/a 3.9
Ψ
JT
Junction-to-Top thermal parameter 9.2 7.4 0.6
Ψ
JB
Junction-to-Board thermal parameter 50.7 87.9 15.7
T
TSD
Thermal Shut-down junction temperature 170 °C
Table 5. Power Dissipation
PARAMETER TEST CONDITIONS VALUE UNITS
HVD72 120
R
L
= 300 Ω,
Unterminated HVD75 160 mW
Power Dissipation
C
L
= 50 pF (driver)
driver and receiver enabled,
HVD78 200
V
CC
= 3.6 V, T
J
= 150°C
HVD72 155
50% duty cycle square-wave signal at
R
L
= 100 Ω,
signaling rate:
PD RS-422 load HVD75 195 mW
C
L
= 50 pF (driver)
• HVD72 at 250 kbps
HVD78 230
• HVD75 at 20 Mbps
HVD72 190
R
L
= 54 Ω,
• HVD78 at 50 Mbps
RS-485 load HVD75 230 mW
C
L
= 50 pF (driver),
HVD78 260
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