Datasheet

www.ti.com
EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS
200kΩ
500
9V
V
CC
Input
DandREInput
500
9V
V
CC
Input
DEInput
200kΩ
16V
16V
V
CC
Input
AInput
16V
16V
V
CC
Input
BInput
36kΩ
V
CC
AandBOutputs
16V
16V
Output
V
CC
ROutputs
Output
5 Ω
9V
36kΩ
180k Ω
36kΩ
180kΩ
36kΩ
THERMAL CHARACTERISTICS
SN65HVD485E
SLLS612C – JUNE 2004 – REVISED MARCH 2007
DGK PACKAGE
PARAMETER MIN TYP MAX UNIT
θ
JA
Junction-to-ambient thermal resistance
(1)
Low-k
(2)
board, no air flow 266 ° C/W
High-k
(3)
board, no air flow 180
θ
JB
Junction-to-board thermal resistance High-k
(3)
board, no air flow 108 ° C/W
θ
JC
Junction-to-case thermal resistance 66
P
(AVG)
Average power dissipation R
L
= 54 Ω , Input to D is a 10 Mbps 50% duty 219 mW
cycle square wave V
CC
at 5.5 V, T
J
= 130 ° C
T
A
Ambient air temperature JEDEC High K board model –40 93 ° C
JEDEC Low K board model –40 75 ° C
T
SD
Thermal shut-down junction temperature 165 ° C
(1) See TI application note SZZA003 , Package Thermal Characterization Methodologies, for an explanation of this parameter.
(2) JESD51-3 Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
(3) JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
10
Submit Documentation Feedback