Datasheet

SN65HVD30 – SN65HVD35
SLLS665I –SEPTEMBER 2005–REVISED APRIL 2010 www.ti.com
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
HVD30, HVD33 26 45
Propagation delay time,
t
PLH
low-to-high-level output
HVD31, HVD32, HVD34, HVD35 47 70
HVD30, HVD33 29 45
Propagation delay time,
t
PHL
high-to-low-level output
HVD31, HVD32, HVD34, HVD35 49 70
V
ID
= -1.5 V to 1.5 V,
C
L
= 15 pF, See Figure 9
HVD30, HVD33 7
t
sk(p)
Pulse skew (|t
PHL
– t
PLH
|)
HVD31, HVD34, HVD32, HVD35 10
t
r
Output signal rise time 5
ns
t
f
Output signal fall time 6
t
PHZ
Output disable time from high level 20
DE at 3 V
C
L
= 15 pF,
t
PZH1
Output enable time to high level 20
See Figure 10
t
PZH2
Propagation delay time, standby-to-high-level output DE at 0 V 4000
t
PLZ
Output disable time from low level 20
DE at 3 V
C
L
= 15 pF,
t
PZL1
Output enable time to low level 20
See Figure 11
t
PZL2
Propagation delay time, standby-to-low-level output DE at 0 V 4000
(1) All typical values are at 25°C and with a 3.3-V supply
DEVICE POWER DISSIPATION – P
D
PARAMETER TEST CONDITIONS VALU UNITS
E
JEDEC Low-K model 231
SOIC-8
JEDEC High-K model 135
q
JA
Junction-to-Ambient Thermal Resistance JEDEC Low-K model 163 °C/W
SOIC-14
JEDEC High-K model 92
QFN-20 73
SOIC-8 44
q
JB
Junction-to- Board Thermal Resistance SOIC-14 61 °C/W
QFN-20
SOIC-8 43
q
JC
Junction-to-Case Thermal Resistance SOIC-14 59 °C/W
QFN-20 14
Power Dissipation HVD30,33 V
CC
= 3.3V, T
J
= 25°C,
Driver and receiver enabled, 50% duty R
L
= 60 Ω, C
L
= 50 pF (driver),
Typical HVD31,34 mW
cycle square-wave signal at signaling
C
L
= 15 pF (receiver)
HVD32,35
rate:
P
D
HVD30,33 at 25 Mbps,
HVD30,33 V
CC
= 3.6V, T
J
= 140°C, 197
HVD31,34 at 5 Mbps,
R
L
= 54 Ω, C
L
= 50 pF (driver),
Worst-case HVD31,34 213 mW
HVD32,35 at 1 Mbps
C
L
= 15 pF (receiver)
HVD32,35 248
T
SD
Thermal Shut-down Junction Temperature 170 °C
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