Datasheet

4
5
9
10
Y
Z
D
DE
A
B
12
11
2
R
3
RE
Low-Power
Standby
SN65HVD30 – SN65HVD35
www.ti.com SLLS665I –SEPTEMBER 2005–REVISED APRIL 2010
DEVICE INFORMATION
LOW-POWER STANDBY MODE
When both the driver and receiver are disabled (DE low and RE high) the device is in standby mode. If the
enable inputs are in this state for less than 60 ns, the device does not enter standby mode. This guards against
inadvertently entering standby mode during driver/receiver enabling. Only when the enable inputs are held in this
state for 300 ns or more, the device is assured to be in standby mode. In this low-power standby mode, most
internal circuitry is powered down, and the supply current is typically less than 1 nA. When either the driver or the
receiver is re-enabled, the internal circuitry becomes active.
Figure 13. Low-Power Standby Logic Diagram
If only the driver is re-enabled (DE transitions to high) the driver outputs are driven according to the D input after
the enable times given by t
PZH2
and t
PZL2
in the driver switching characteristics. If the D input is open when the
driver is enabled, the driver outputs defaults to A high and B low, in accordance with the driver failsafe feature.
If only the receiver is re-enabled (RE transitions to low) the receiver output is driven according to the state of the
bus inputs (A and B) after the enable times given by t
PZH2
and t
PZL2
in the receiver switching characteristics. If
there is no valid state on the bus the receiver responds as described in the failsafe operation section.
If both the receiver and driver are re-enabled simultaneously, the receiver output is driven according to the state
of the bus inputs (A and B) and the driver output is driven according to the D input. Note that the state of the
active driver affects the inputs to the receiver. Therefore, the receiver outputs are valid as soon as the driver
outputs are valid.
DRIVER OUTPUT CURRENT LIMITING
The RS-485 standard (ANSI/TIA/EIA-485-A or equivalently ISO 8482) specifies a 250 mA driver output current
limit to prevent damage caused by data contention on the bus. That applies in the event that two or more
transceivers drive the bus to opposing states at the same time. The HVD3x family of devices includes current
limiting circuitry that prevents damage under these conditions. Note that this current limit prevents damage
during the bus contention, but the logic state of the bus may be indeterminate as specified by the standard, so
communication errors may occur.
In a specific combination of circumstances, a condition may occur in which current through the bus pin exceeds
the 250 mA limit. This combination of conditions is not normally included in RS-485 applications:
• loading capacitance on the pin is less than 500 pF
• the bus pin is directly connected to a voltage more negative than –1V
• the device is supplied with Vcc equal or greater than 3.3V
• the driver is enabled
• the bus pin is driving to the logic high state.
In these specific conditions, the normal current limit circuitry and thermal shutdown circuitry will not limit or
shutdown the current flow. If the current is allowed to continue, the device will heat up in a localized area near
the driver outputs, and the device may be damaged.
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