Datasheet
www.ti.com
ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM POWER DISSIPATION RATINGS
SN65HVD251-Q1
SLLS788 – APRIL 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
(1)
PART NUMBER PACKAGE MARKED AS
SN65HVD251QDRQ1 8-pin SOIC (Tape and Reel) 251Q1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
over operating free-air temperature range (unless otherwise noted)
(1) (2)
SN65HVD251
Supply voltage range, V
CC
–0.3 V to 7 V
Voltage range at any bus terminal CANH, CANL –36 V to 36 V
Transient voltage per ISO 7637, pulse 1, 2, 3a, 3b CANH, CANL ± 200 V
Input voltage range, V
I
D, Rs, R –0.3 V to V
CC
+ 0.5
Receiver output current, I
O
–10 mA to 10 mA
CANH, CANL, GND 9 kV
Human-Body Model
(3)
All pins 6 kV
Electrostatic discharge
Charged-Device Model
(4)
All pins 1 kV
Machine Model All pins 200 V
Continuous total power dissipation See Dissipation Rating Table
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A
(4) Tested in accordance with JEDEC Standard 22, Test Method C101
CIRCUIT BOARD T
A
= 25 ° C DERATING FACTOR
(1)
T
A
= 85 ° C POWER T
A
= 125 ° C POWER
PACKAGE
MODEL POWER RATING ABOVE T
A
= 25 ° C RATING RATING
Low-K
(2)
576 mW 4.8 mW/ ° C 288 mW 96 mW
SOIC (D)
High-K
(3)
924 mW 7.7 mW/ ° C 462 mW 154 mW
(1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
(2) In accordance with the Low-K thermal metric definitions of EIA/JESD51-3
(3) In accordance with the High-K thermal metric definitions of EIA/JESD51-7
2
Submit Documentation Feedback