Datasheet


SGLS356 − MAY 2006
25
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APPLICATION INFORMATION
Driver
Input
CAN
Bus
Receiver
Output
Figure 36. SN65HVD230M’s Input, CAN Bus, and X250’s RXD Output Waveforms
Figure 36 displays the SN65HVD230M’s input signal, the CAN bus, and the competitor X250’s receiver output
waveforms. The input waveform from the Tektronix HFS-9003 Pattern Generator in Figure 35 to the
SN65HVD230M is a 250-kbps pulse for this test. The circuit is monitored with Tektronix P6243, 1-GHz
single-ended probes in order to display the CAN dominant and recessive bus states.
Figure 36 displays the 250-kbps pulse input waveform to the SN65HVD230M on channel 1. Channels 2 and
3 display CANH and CANL respectively, with their recessive bus states overlaying each other to clearly display
the dominant and recessive CAN bus states. Channel 4 is the receiver output waveform of the competitor X250.