Datasheet

SN65HVD21A
www.ti.com SLLSE36 –DECEMBER 2010
RECEIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditions
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
V
IT(+)
Positive-going differential input voltage threshold V
O
= 2.4 V, I
O
= –8 mA 60 200
See Figure 10 mV
V
IT(–)
Negative-going differential input voltage threshold V
O
= 0.4 V, I
O
= 8 mA –200 –60
V
HYS
Hysteresis voltage (V
IT+
– V
IT–
) 100 130 mV
VCM = −7 V to 12 V 40 120 200
Positive-going differential input failsafe voltage
V
IT(F+)
See Figure 15 mV
threshold
VCM = −20 V to 25 V 120 250
VCM = −7 V to 12 V –200 –120 −40
Negative-going differential input failsafe voltage
V
IT(F–)
See Figure 15 mV
threshold
VCM = −20 V to 25 V –250 –120
V
IK
Input clamp voltage I
I
= –18 mA –1.5 V
V
OH
High-level output voltage V
ID
= 200 mV, I
OH
= −8 mA, See Figure 11 4 V
V
OL
Low-level output voltage V
ID
= –200 mV, I
OL
= 8 mA, See Figure 11 0.4 V
V
I
= –7 to 12 V, Other input = 0 V –100 125
I
I(BUS)
Bus input current (power on or power off) µA
V
I
= −20 to 25 V, Other input = 0 V –200 250
I
I
Input current RE –100 100 µA
R
I
Input resistance 96 kΩ
C
ID
Differential input capacitance 20 pF
V
ID
= 0.5 + 0.4 sine (2p × 1.5 × 10
6
t)
(1) All typical values are at 25°C.
RECEIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low-to-high level output
See Figure 11 25 50 ns
t
PHL
Propagation delay time high-to low level output
t
r
Receiver output rise time
See Figure 11 2 4 ns
t
f
Receiver output fall time
t
PZH
Receiver output enable time to high level 90 120 ns
See Figure 12
t
PHZ
Receiver output disable time from high level 16 35
t
PZL
Receiver output enable time to low level 90 120 ns
See Figure 13
t
PLZ
Receiver output disable time from low level 16 35
t
r(standby)
Time from an active receiver output to standby 2 µs
See Figure 14, DE at 0 V
t
r(wake)
Wake-up time from standby to an active receiver output 8
t
sk(p)
Pulse skew |t
PLH
– t
PHL
| 5
t
p(set)
Delay time, bus fail to failsafe set 250 350 µs
See Figure 15, pulse rate = 1 kHz
t
p(reset)
Delay time, bus recovery to failsafe reset 50 ns
SUPPLY CURRENT
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver enabled (DE at V
CC
), Receiver enabled (RE at 0 V),
8 12 mA
No load, V
I
= 0 V or V
CC
Driver enabled (DE at V
CC
), Receiver disabled (RE at V
CC
),
Supply
7 11 mA
I
CC
No load, V
I
= 0 V or V
CC
current
Driver disabled (DE at 0 V), Receiver enabled (RE at 0 V), No load 5 8 mA
Driver disabled (DE at 0 V), Receiver disabled (RE at V
CC
) D open 1 µA
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