Datasheet

SN65HVD1794, SN65HVD1795

SN65HVD1796

www.ti.com

SLLS935A –AUGUST 2008–REVISED AUGUST 2012

APPLICATION INFORMATION

Hot-Plugging

These devices are designed to operate in "hot swap" or "hot pluggable" applications. Key features for hot-

pluggable applications are power-up, power-down glitch free operation, default disabled input/output pins, and

receiver failsafe. As shown in Figure 8, an internal Power-On Reset circuit keeps the driver outputs in a high-

impedance state until the supply voltage has reached a level at which the device will reliably operate. This

ensures that no spurious transitions (glitches) will occur on the bus pin outputs as the power supply turns on or

turns off.

As shown in the device FUNCTION TABLE, the ENABLE inputs have the feature of default disable on both the

driver enable and receiver enable. This ensures that the device will neither drive the bus nor report data on the R

pin until the associated controller actively drives the enable pins.

Likewise, the receiver output is "failsafe" to open-circuit, short-circuit, or idle (terminated only) bus conditions.

This eliminates false transitions on the receiver output until a valid RS-485 signal is applied to the receiver input

pins.

Cable Invert

For many RS-485 applications, wiring of data cables takes place during equipment installation, and the possibility

of miss-wiring is a significant issue. When the twisted-pair wires are reversed due to installation mistakes, normal

RS-485 communication is not possible. The Cable Invert (INV) pin allows designers to compensate for this

installation mistake. Under normal circumstances, the INV pin can be set to logic LOW, and the transceiver

operates with normal polarity. If, after initial network start-up, a node cannot communicate properly, the local

controller can set the INV pin high, which will invert the polarity of the A and B differential bus pins. This will

compensate for a reversal of the bus wires, allowing proper communication.

Receiver Failsafe

The differential receiver is “failsafe” to invalid bus states caused by open bus conditions such as a disconnected

connector, shorted bus conditions such as cable damage shorting the twisted-pair together or idle bus conditions

that occur when no driver is actively driving a valid RS-485 bus state on the network. In any of these cases, the

differential receiver outputs a failsafe state, so that small noise signals do not cause spurious transitions at the

receiver output. When INV is logic Low or Open (normal operation), the receiver output will be failsafe High.

When INV is logic High to correct for a twisted-pair reversal, the receiver output will be failsafe Low under those

fault conditions.

Product Folder Links: SN65HVD1794, SN65HVD1795 SN65HVD1796