Datasheet
I
I
I
O
I
O
V
OD 50pF
27 Ω
27 Ω
V
OC
0Vor3V
A
B
D
SN65HVD1176
SN75HVD1176
www.ti.com
SLLS563F –JULY 2003–REVISED JUNE 2013
Table 2. SUPPLY CURRENT
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Driver and receiver, RE at 0 V, DE at V
CC
, All other inputs open, no load 4 6 mA
Driver only, RE at V
CC
, DE at V
CC
, All other inputs open, no load 3.8 6 mA
Supply
I
CC
Current
(1)
Receiver only, RE at 0 V, DE at 0 V, All other inputs open, no load 3.6 6 mA
Standby only, RE at V
CC
, DE at 0 V, All other inputs open 0.2 5 μA
(1) Over recommended operating conditions
THERMAL CHARACTERISTICS
(1)
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(2)
MAX UNIT
Low-K board
(4)
, no air flow 208.3 °C/W
θ
JA
Junction-to-ambient thermal resistance
(3)
High-K board
(5)
, no air flow 128.7 °C/W
θ
JB
Junction-to-board thermal resistance High-K board 77.6 °C/W
θ
JC
Junction-to-case thermal resistance 43.9 °C/W
R
L
= 54 Ω, C
L
= 50 pF, 0 V to 3 V,
P
D
Device power dissipation 15 MHz, 50% duty cycle square wave 277 318 mW
input, driver and receiver enabled
SN65HVD1176 –40 64 °C
Low-K board, no air flow,
P
D
= 318 mW
SN75HVD1176 0 °C
T
A
Ambient air temperature
SN65HVD1176 –40 89 °C
High-K board, no air flow,
P
D
= 318 mW
SN75HVD1176 0 °C
T
SD
Thermal shut down junction temperature 150 °C
(1) See Application Information section for an explanation of these parameters.
(2) All typical values are with V
CC
= 5 V and T
A
= 25°C.
(3) The intent of θ
JA
specification is solely for a thermal performance comparison of one package to another in a standardized environment.
This methodology is not meant to and will not predict the performance of a package in an application-specific environment.
(4) JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
(5) JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
PARAMETER MEASUREMENT INFORMATION
NOTE
Test load capacitance includes probe and jig capacitance (unless otherwise specified).
Signal generator characteristics: rise and fall time < 6 ns, pulse rate 100 kHz, 50% duty
cycle, Z
o
= 50 Ω (unless otherwise specified).
Figure 1. Driver Test Circuit, V
OD
and V
OC
Without Common-Mode Loading
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