Datasheet

CANH
CANL
TXD
S
V
I
47 nF
+20%
27 W +1%
27 W +1%
V
OC
=
V
O(CANH)
+ V
O(CANL)
2
DV
OC(SS)
V
OC
+
_
DUT
TXD
S
RXD
V
I
C
L
CANH
CANL
NOTE:C
L
=100pF
includesinstrumentation
andfixturecapacitance
within ±20%
V
O
50%
50%
50%
V
CC
0V
V
OH
V
OL
TXDInput
RXDOutput
t
loop2
t
loop1
15pF±20%
60
±1%
W
SN65HVD1050-EP
www.ti.com
SLLS772A DECEMBER 2006REVISED OCTOBER 2009
Figure 7. t
en
Test Circuit and Waveforms
NOTE: All V
I
input pulses are from 0 V to V
CC
and supplied by a generator having the following characteristics: t
r
or t
f
6 ns.
Pulse Repetition Rate (PRR) = 125 kHz, 50% duty cycle.
Figure 8. Common-Mode Output Voltage Test and Waveform
A. All V
I
input pulses are from 0 V to V
CC
and supplied by a generator having the following characteristics: t
r
or t
f
6 ns.
Pulse Repetition Rate (PRR) = 125 kHz, 50% duty cycle.
Figure 9. t
(LOOP)
Test Circuit and Waveform
Copyright © 2006–2009, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s) :SN65HVD1050-EP