Datasheet
SN65HVD1050
SLLS632B –DECEMBER 2005–REVISED MARCH 2010
www.ti.com
DRIVER ELECTRICAL CHARACTERISTICS
over recommended operating conditiions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
4.75V < V
CC
< 5.25V 2.9 3.4 4.5
CANH
V
I
= 0 V, S at 0 V, R
L
4.5V < V
CC
< 5.5V 2.75 5.2
V
O(D)
Bus output voltage (Dominant) = 60 Ω, See Figure 1 V
4.75V < V
CC
< 5.25V 0.8 1.5
and Figure 2
CANL
4.5V < V
CC
< 5.5V 1.6
V
I
= 3 V, S at 0 V, R
L
4.75V < V
CC
< 5.25V 2 2.3 3
V
O(R)
Bus output voltage (Recessive) = 60 Ω, See Figure 1 V
4.5V < V
CC
< 5.5V 1.8 3
and Figure 2
V
I
= 0 V, R
L
= 60 Ω, S 4.75V < V
CC
< 5.25V 1.5 3
at 0 V, See Figure 1, V
4.5V < V
CC
< 5.5V 1.4 3
Figure 2, and Figure 3
V
OD(D)
Differential output voltage (Dominant)
V
I
= 0 V, R
L
= 45 Ω, S 4.75V < V
CC
< 5.25V 1.4 3
at 0 V, See Figure 1, V
4.5V < V
CC
< 5.5V 1.3 3
Figure 2, and Figure 3
V
I
= 3 V, S at 0 V, See Figure 1 and Figure 2 –0.012 0.012
V
OD(R)
Differential output voltage (Recessive) V
V
I
= 3 V, S at 0 V, No Load –0.5 0.05
4.75V < V
CC
< 5.25V 2 2.3 3
Steady state common-mode output
V
OC(ss)
V
voltage
4.5V < V
CC
< 5.5V 1.9 3
S at 0 V, Figure 8
Change in steady-state common-mode
ΔV
OC(ss)
30 mV
output voltage
I
IH
High-level input current, TXD input V
I
at V
CC
–2 2
I
IL
Low-level input current, TXD input V
I
at 0 V –50 –10 mA
I
O(off)
Power-off TXD output current V
CC
at 0 V, TXD at 5 V 1
V
CANH
= -12 V, CANL Open, See Figure 11 –105 –72
V
CANH
= 12 V, CANL Open, SeeFigure 11 0.36 1
I
OS(ss)
Short-circuit steady-state output current mA
V
CANL
= -12 V, CANH Open, See Figure 11 –1 –0.5
V
CANL
= 12 V, CANH Open, See Figure 11 71 105
C
O
Output capacitance See receiver input capacitance
(1) All typical values are at 25°C with a 5-V supply.
DRIVER SWITCHING CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay time, low-to-high-level output 25 65 120
t
PHL
Propagation delay time, high-to-low-level output 25 45 90
S at 0 V, See Figure 4 ns
t
r
Differential output signal rise time 25
t
f
Differential output signal fall time 50
t
en
Enable time from silent mode to dominant See Figure 7 1 ms
4.75V < V
CC
< 5.25V 300 450 700
↓V
I
, See
t
(dom)
Dominant time-out ms
Figure 10
4.5V < V
CC
< 5.5V 280 700
4 Submit Documentation Feedback Copyright © 2005–2010, Texas Instruments Incorporated
Product Folder Link(s) :SN65HVD1050