Datasheet
DESCRIPTION (Continued)
1
2
3
4
8
7
6
5
TXD
GND
V
CC
RXD
STB
CANH
CANL
SPLIT
SN65HVD1040
SN65HVD1040
SLLS631D – MARCH 2007 – REVISED DECEMBER 2008 ...............................................................................................................................................
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
The STB input (pin 8) selects between two different modes of operation; high-speed or low-power mode. The
high-speed mode of operation is selected by connecting STB to ground.
If a high logic level is applied to the STB pin of the SN65HVD1040, the device enters a low-power bus-monitor
standby mode. While the SN65HVD1040 is in the low-power bus-monitor standby mode, a dominant bit greater
than 5 µ s on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller may
then reactivate the device when it needs to transmit to the bus.
A dominant-time-out circuit in the SN65HVD1040 prevents the driver from blocking network communication
during a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no
rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then
reset by the next rising edge on TXD.
The SPLIT output (pin 5) is available on the SN65HVD1040 as a V
CC
/2 common-mode bus voltage bias for a
split-termination network.
The SN65HVD1040 is characterized for operation from – 40 ° C to 125 ° C.
ORDERING INFORMATION
DOMINANT LOW-POWER MARKED
PART NUMBER PACKAGE
(1)
ORDERING NUMBER
TIME-OUT BUS MONITOR AS
SN65HVD1040D (rail)
SN65HVD1040 YES YES SOIC-8 VP1040
SN65HVD1040DR (reel)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com .
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Product Folder Link(s): SN65HVD1040