Datasheet

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Host
SN65HVD08
Power Bus and Return Resistance
Isolation
Barrier
Remote
(One of n Shown)
5 V Power
Direct
Connection
to Host
5 V Return
PACKAGE DISSIPATION RATINGS
ABSOLUTE MAXIMUM RATINGS
SN75HVD08 , SN65HVD08
SLLS550C – NOVEMBER 2002 – REVISED JULY 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
SPECIFIED TEMPERATURE
PART NUMBER PACKAGE PACKAGE MARKING
RANGE
SN65HVD08D –40°C to 85°C SOIC VP08
SN65HVD08P –40°C to 85°C PDIP 65HVD08
SN75HVD08D 0°C to 70°C SOIC VN08
SN75HVD08P 0°C to 70°C PDIP 75HVD08
PACKAGE T
A
≤ 25°C POWER RATING DERATING FACTOR ABOVE T
A
= 25°C T
A
= 85°C POWER RATING
SOIC (D) 710 mW 5.7 mW/°C 369 mW
PDIP (P) 1000 mW 8 mW/°C 520 mW
over operating free-air temperature range unless otherwise noted
(1) (2)
UNIT
Supply voltage, V
CC
-0.3 V to 6 V
Voltage range at A or B -9 V to 14 V
Input voltage range at D, DE, R or RE -0.5 V to V
CC
+ 0.5 V
Voltage input range, transient pulse, A and B, through 100 Ω -25 V to 25 V
Receiver ouput current, I
O
–11 mA to 11 mA
A, B, and GND 16 kV
Human Body Model
(3)
Electrostatic discharge All pins 4 kV
Charged-Device Model
(4)
All pins 1 kV
Continuous total power dissipation See Dissipation Rating Table
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with JEDEC Standard 22, Test Method A114-A.
(4) Tested in accordance with JEDEC Standard 22, Test Method C101.
2
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