Datasheet
I
OA
V
OD 54 Ω ±1%
0 or 3 V
V
OA
V
OB
I
OB
DE
V
CC
I
I
V
I
A
B
60 Ω ±1%
V
OD
0 or 3 V
_
+
-7 V < V
(test)
< 12 V
DE
V
CC
A
B
D
375 Ω ±1%
375 Ω ±1%
SN65HVD05, SN65HVD06
SN75HVD05, SN65HVD07
SN75HVD06, SN75HVD07
SLLS533E –MAY 2002– REVISED AUGUST 2009
www.ti.com
RECEIVER SWITCHING CHARACTERISTICS
over operating free-air temperature range unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
t
PLH
Propagation delay time, low-to-high-level output 1/2 UL HVD05 14.6 25 ns
t
PHL
Propagation delay time, high-to-low-level output 1/2 UL HVD05 14.6 25 ns
HVD06 55 70
t
PLH
Propagation delay time, low-to-high-level output 1/8 UL ns
HVD07 55 70
HVD06 55 70
t
PHL
Propagation delay time, high-to-low-level output 1/8 UL ns
V
ID
= –1.5 V to 1.5 V,
HVD07 55 70
C
L
= 15 pF,
HVD05 2
See Figure 8
t
sk(p)
Pulse skew (|t
PHL
– t
PLH
|) HVD06 4.5 ns
HVD07 4.5
HVD05 6.5
t
sk(pp)
(2)
Part-to-part skew HVD06 14 ns
HVD07 14
t
r
Output signal rise time 2 3
C
L
= 15 pF,
ns
See Figure 8
t
f
Output signal fall time 2 3
t
PZH1
Output enable time to high level 10
C
L
= 15 pF,
t
PZL1
Output enable time to low level 10
DE at 3 V, ns
t
PHZ
Output disable time from high level 15
See Figure 9
t
PLZ
Output disable time from low level 15
t
PZH2
Propagation delay time, standby-to-high-level output 6
C
L
= 15 pF, DE at 0,
μs
See Figure 10
t
PZL2
Propagation delay time, standby-to-low-level output 6
(1) All typical values are at 25°C and with a 5-V supply.
(2) t
sk(pp)
is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices
operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
PARAMETER MEASUREMENT INFORMATION
Figure 1. Driver V
OD
Test Circuit and Voltage and Current Definitions
Figure 2. Driver V
OD
With Common-Mode Loading Test Circuit
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